Sinan Kaptanoglu

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Omnibus logic element
- Patent number 10,177,766
- Issue date Jan 8, 2019
- Altera Corporation
- James Schleicher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Omnibus logic element
- Patent number 9,496,875
- Issue date Nov 15, 2016
- Altera Corporation
- James Schleicher
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and methods for time-multiplex field-programmable gate ar...
- Patent number 9,270,279
- Issue date Feb 23, 2016
- Altera Corporation
- Sinan Kaptanoglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dedicated interface architecture for a hybrid integrated circuit
- Patent number 8,990,757
- Issue date Mar 24, 2015
- Microsemi SoC Corporation
- King W. Chan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Omnibus logic element
- Patent number 8,878,567
- Issue date Nov 4, 2014
- Altera Corporation
- James Schleicher
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and methods for time-multiplex field-programmable gate ar...
- Patent number 8,856,711
- Issue date Oct 7, 2014
- Altera Corporation
- Sinan Kaptanoglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Omnibus logic element for packing or fracturing
- Patent number 8,593,174
- Issue date Nov 26, 2013
- Altera Corporation
- James Schleicher
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and methods for time-multiplex field-programmable gate ar...
- Patent number 8,543,955
- Issue date Sep 24, 2013
- Altera Corporation
- Sinan Kaptanoglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Enhanced field programmable gate array
- Patent number 8,258,811
- Issue date Sep 4, 2012
- Actel Corporation
- Samuel W. Beal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Omnibus logic element for packing or fracturing
- Patent number 8,237,465
- Issue date Aug 7, 2012
- Altera Corporation
- James Schleicher
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and methods for time-multiplex field-programmable gate ar...
- Patent number 8,225,259
- Issue date Jul 17, 2012
- Altera Corporation
- David W. Mendel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fracturable lookup table and logic element
- Patent number 8,217,678
- Issue date Jul 10, 2012
- Altera Corporation
- David Lewis
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dedicated crossbar and barrel shifter block on programmable logic r...
- Patent number 8,082,526
- Issue date Dec 20, 2011
- Altera Corporation
- Michael Hutton
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Enhanced field programmable gate array
- Patent number 7,977,970
- Issue date Jul 12, 2011
- Actel Corporation
- Samuel W. Beal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
(N+1) input flip-flop packing with logic in FPGA architectures
- Patent number 7,944,238
- Issue date May 17, 2011
- Actel Corporation
- Sinan Kaptanoglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clustered field programmable gate array architecture
- Patent number 7,924,053
- Issue date Apr 12, 2011
- Actel Corporation
- Sinan Kaptanoglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Field programmable gate array architecture having Clos network-base...
- Patent number 7,924,052
- Issue date Apr 12, 2011
- Actel Corporation
- Wenyi Feng
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Omnibus logic element for packing or fracturing
- Patent number 7,911,230
- Issue date Mar 22, 2011
- Altera Corporation
- James Schleicher
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fracturable lookup table and logic element
- Patent number 7,800,401
- Issue date Sep 21, 2010
- Altera Corporation
- David Lewis
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
(N+1) input flip-flop packing with logic in FPGA architectures
- Patent number 7,701,250
- Issue date Apr 20, 2010
- Actel Corporation
- Sinan Kaptanoglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Omnibus logic element
- Patent number 7,671,625
- Issue date Mar 2, 2010
- Altera Corporation
- James Schleicher
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Architecture for routing resources in a field programmable gate array
- Patent number 7,579,868
- Issue date Aug 25, 2009
- Actel Corporation
- Sinan Kaptanoglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Block level routing architecture in a field programmable gate array
- Patent number 7,557,611
- Issue date Jul 7, 2009
- Actel Corporation
- Sinan Kaptanoglu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Block symmetrization in a field programmable gate array
- Patent number 7,557,612
- Issue date Jul 7, 2009
- Actel Corporation
- Sinan Kaptanoglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
FPGA architecture having two-level cluster input interconnect schem...
- Patent number 7,545,169
- Issue date Jun 9, 2009
- Actel Corporation
- Wenyi Feng
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Omnibus logic element
- Patent number 7,538,579
- Issue date May 26, 2009
- Altera Corporation
- James Schleicher
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
FPGA architecture having two-level cluster input interconnect schem...
- Patent number 7,408,383
- Issue date Aug 5, 2008
- Actel Corporation
- Wenyi Feng
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dedicated interface architecture for a hybrid integrated circuit
- Patent number 7,389,487
- Issue date Jun 17, 2008
- Actel Corporation
- King W. Chan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Block symmetrization in a field programmable gate array
- Patent number 7,385,421
- Issue date Jun 10, 2008
- Actel Corporation
- Sinan Kaptanoglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Organizations of logic modules in programmable logic devices
- Patent number 7,368,944
- Issue date May 6, 2008
- Altera Corporation
- Michael D Hutton
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Apparatus and Methods for Time-Multiplex Field-Programmable Gate Ar...
- Publication number 20150022236
- Publication date Jan 22, 2015
- Altera Corporation
- Sinan Kaptanoglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Apparatus and Methods for Time-Multiplex Field-Programmable Gate Ar...
- Publication number 20130207688
- Publication date Aug 15, 2013
- Altera Corporation
- Sinan Kaptanoglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ENHANCED FIELD PROGRAMMABLE GATE ARRAY
- Publication number 20100244894
- Publication date Sep 30, 2010
- Actel Corporation
- Samuel W. Beal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
(N+1) INPUT FLIP-FLOP PACKING WITH LOGIC IN FPGA ARCHITECTURES
- Publication number 20100156460
- Publication date Jun 24, 2010
- Actel Corporation
- Sinan Kaptanoglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
BLOCK SYMMETRIZATION IN A FIELD PROGRAMMABLE GATE ARRAY
- Publication number 20080258763
- Publication date Oct 23, 2008
- Actel Corporation
- Sinan Kaptanoglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DEDICATED INTERFACE ARCHITECTURE FOR A HYBRID INTEGRATED CIRCUIT
- Publication number 20080204074
- Publication date Aug 28, 2008
- Actel Corporation
- King W. Chan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dedicated crossbar and barrel shifter block on programmable logic r...
- Publication number 20080136449
- Publication date Jun 12, 2008
- Altera Corporation
- Michael Hutton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BLOCK LEVEL ROUTING ARCHITECTURE IN A FIELD PROGRAMMABLE GATE ARRAY
- Publication number 20080136446
- Publication date Jun 12, 2008
- Actel Corporation
- Sinan Kaptanoglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ARCHITECTURE FOR ROUTING RESOURCES IN A FIELD PROGRAMMABLE GATE ARRAY
- Publication number 20070285126
- Publication date Dec 13, 2007
- Actel Corporation
- Sinan Kaptanoglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FRACTURABLE LOOKUP TABLE AND LOGIC ELEMENT
- Publication number 20070222477
- Publication date Sep 27, 2007
- Altera Corporation
- David Lewis
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
BLOCK SYMMETRIZATION IN A FIELD PROGRAMMABLE GATE ARRAY
- Publication number 20070210829
- Publication date Sep 13, 2007
- Actel Corporation
- Sinan Kaptanoglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Area efficient fractureable logic elements
- Publication number 20070063732
- Publication date Mar 22, 2007
- Altera Corporation
- Sinan Kaptanoglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Fracturable lookup table and logic element
- Publication number 20060017460
- Publication date Jan 26, 2006
- Altera Corporation
- David Lewis
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Turn architecture for routing resources in a field programmable gat...
- Publication number 20050273750
- Publication date Dec 8, 2005
- Actel Corporation, a California Corporation
- Sinan Kaptanoglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Block level routing architecture in a field programmable gate array
- Publication number 20050184753
- Publication date Aug 25, 2005
- Actel Corporation, a California Corporation
- Sinan Kaptanoglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Fracturable incomplete look up table for area efficient logic elements
- Publication number 20040155676
- Publication date Aug 12, 2004
- Sinan Kaptanoglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Fracturable lookup table and logic element
- Publication number 20040155677
- Publication date Aug 12, 2004
- David Lewis
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Turn architecture for routing resources in a field programmable gat...
- Publication number 20030196184
- Publication date Oct 16, 2003
- Sinan Kaptanoglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Block level routing architecture in a field programmable gate array
- Publication number 20030121020
- Publication date Jun 26, 2003
- Actel Corporation, a California Corporation
- Sinan Kaptanoglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Block connector splitting in logic block of a field programmable ga...
- Publication number 20020011870
- Publication date Jan 31, 2002
- Sinan Kaptanoglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Block symmetrization in a field programmable gate array
- Publication number 20010028257
- Publication date Oct 11, 2001
- Sinan Kaptanoglu
- H03 - BASIC ELECTRONIC CIRCUITRY

Sinan Kaptanoglu

Person

Patents Grantslast 30 patents

Omnibus logic element

Omnibus logic element

Apparatus and methods for time-multiplex field-programmable gate ar...

Dedicated interface architecture for a hybrid integrated circuit

Omnibus logic element

Apparatus and methods for time-multiplex field-programmable gate ar...

Omnibus logic element for packing or fracturing

Apparatus and methods for time-multiplex field-programmable gate ar...

Enhanced field programmable gate array

Omnibus logic element for packing or fracturing

Apparatus and methods for time-multiplex field-programmable gate ar...

Fracturable lookup table and logic element

Dedicated crossbar and barrel shifter block on programmable logic r...

Enhanced field programmable gate array

(N+1) input flip-flop packing with logic in FPGA architectures

Clustered field programmable gate array architecture

Field programmable gate array architecture having Clos network-base...

Omnibus logic element for packing or fracturing

Fracturable lookup table and logic element

(N+1) input flip-flop packing with logic in FPGA architectures

Omnibus logic element

Architecture for routing resources in a field programmable gate array

Block level routing architecture in a field programmable gate array

Block symmetrization in a field programmable gate array

FPGA architecture having two-level cluster input interconnect schem...

Omnibus logic element

FPGA architecture having two-level cluster input interconnect schem...

Dedicated interface architecture for a hybrid integrated circuit

Block symmetrization in a field programmable gate array

Organizations of logic modules in programmable logic devices

Patents Applicationslast 30 patents

Apparatus and Methods for Time-Multiplex Field-Programmable Gate Ar...

Apparatus and Methods for Time-Multiplex Field-Programmable Gate Ar...

ENHANCED FIELD PROGRAMMABLE GATE ARRAY

(N+1) INPUT FLIP-FLOP PACKING WITH LOGIC IN FPGA ARCHITECTURES

BLOCK SYMMETRIZATION IN A FIELD PROGRAMMABLE GATE ARRAY

DEDICATED INTERFACE ARCHITECTURE FOR A HYBRID INTEGRATED CIRCUIT

Dedicated crossbar and barrel shifter block on programmable logic r...

BLOCK LEVEL ROUTING ARCHITECTURE IN A FIELD PROGRAMMABLE GATE ARRAY

ARCHITECTURE FOR ROUTING RESOURCES IN A FIELD PROGRAMMABLE GATE ARRAY

FRACTURABLE LOOKUP TABLE AND LOGIC ELEMENT

BLOCK SYMMETRIZATION IN A FIELD PROGRAMMABLE GATE ARRAY

Area efficient fractureable logic elements

Fracturable lookup table and logic element

Turn architecture for routing resources in a field programmable gat...

Block level routing architecture in a field programmable gate array

Fracturable incomplete look up table for area efficient logic elements

Fracturable lookup table and logic element

Turn architecture for routing resources in a field programmable gat...

Block level routing architecture in a field programmable gate array

Block connector splitting in logic block of a field programmable ga...

Block symmetrization in a field programmable gate array