Srikanth B. Samavedam

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Fin-based Schottky diode for integrated circuit (IC) products and m...
- Patent number 11,462,648
- Issue date Oct 4, 2022
- GLOBALFOUNDRIES U.S. INC.
- Jagar Singh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with doped region adjacent isolation structure...
- Patent number 11,195,947
- Issue date Dec 7, 2021
- GLOBALFOUNDRIES U.S. INC.
- Jagar Singh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High voltage transistor with fin source/drain regions and trench ga...
- Patent number 11,127,818
- Issue date Sep 21, 2021
- GLOBALFOUNDRIES U.S. INC.
- Jagar Singh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fin-type field effect transistors with uniform channel lengths and...
- Patent number 10,644,157
- Issue date May 5, 2020
- GLOBALFOUNDRIES Inc.
- Julien Frougier
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor device structures with retrograde wells in CMOS applicat...
- Patent number 10,483,172
- Issue date Nov 19, 2019
- GLOBALFOUNDRIES Inc.
- Vara G. Reddy Vakada
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming source/drain regions on FinFET devices
- Patent number 10,347,748
- Issue date Jul 9, 2019
- GLOBALFOUNDRIES Inc.
- Shesh Mani Pandey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
FinFET device and method of manufacturing
- Patent number 9,966,313
- Issue date May 8, 2018
- GLOBALFOUNDRIES Inc.
- Shesh Mani Pandey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
SRAM cell having dual pass gate transistors and method of making th...
- Patent number 9,935,112
- Issue date Apr 3, 2018
- GLOBALFOUNDRIES Inc.
- Hui Zang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming transistors with retrograde wells in CMOS applic...
- Patent number 9,852,954
- Issue date Dec 26, 2017
- GLOBALFOUNDRIES Inc.
- Vara G. Reddy Vakada
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits with varying gate structures and fabrication me...
- Patent number 9,576,952
- Issue date Feb 21, 2017
- GLOBALFOUNDRIES Inc.
- Manoj Joshi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual three-dimensional and RF semiconductor devices using local SOI
- Patent number 9,508,743
- Issue date Nov 29, 2016
- GLOBALFOUNDRIES Inc.
- Jagar Singh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integration method for fabrication of metal gate based multiple thr...
- Patent number 9,455,201
- Issue date Sep 27, 2016
- GLOBALFOUNDRIES Inc.
- Manoj Joshi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Epitaxially forming a set of fins in a semiconductor device
- Patent number 9,437,740
- Issue date Sep 6, 2016
- GLOBALFOUNDRIES Inc.
- Johannes M. van Meer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit having multiple threshold voltages
- Patent number 9,362,180
- Issue date Jun 7, 2016
- GLOBALFOUNDRIES Inc.
- Bongki Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor devices with different dielectric thicknesses
- Patent number 9,362,280
- Issue date Jun 7, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Gauri V. Karve
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Blanket EPI super steep retrograde well formation without Si recess
- Patent number 9,362,357
- Issue date Jun 7, 2016
- GLOBALFOUNDRIES Inc.
- Laegu Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming transistors with retrograde wells in CMOS applic...
- Patent number 9,209,181
- Issue date Dec 8, 2015
- GLOBALFOUNDRIES Inc.
- Vara G. Reddy Vakada
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of using a trench salicide routing layer
- Patent number 9,196,548
- Issue date Nov 24, 2015
- GLOBALFOUNDRIES Inc.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Blanket EPI super steep retrograde well formation without Si recess
- Patent number 9,099,525
- Issue date Aug 4, 2015
- GLOBALFOUNDRIES Inc.
- Laegu Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming replacement gate structures with a recessed channel
- Patent number 9,099,492
- Issue date Aug 4, 2015
- GLOBALFOUNDRIES Inc.
- Kuldeep Amarnath
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming step doping channel profile for super steep retro...
- Patent number 9,099,380
- Issue date Aug 4, 2015
- GLOBALFOUNDRIES Inc.
- Vara Govindeswara Reddy Vakada
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Replacement metal gate structure for CMOS device
- Patent number 9,040,404
- Issue date May 26, 2015
- International Business Machines Corporation
- Takashi Ando
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Epitaxially forming a set of fins in a semiconductor device
- Patent number 9,034,737
- Issue date May 19, 2015
- GLOBALFOUNDRIES Inc.
- Johannes M. van Meer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming step doping channel profile for super steep retro...
- Patent number 8,916,442
- Issue date Dec 23, 2014
- GLOBALFOUNDRIES Inc.
- Vara Govindeswara Reddy Vakada
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming bulk FinFET devices with replacement gates so as...
- Patent number 8,809,178
- Issue date Aug 19, 2014
- GLOBALFOUNDRIES Inc.
- Yanxiang Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor devices with different dielectric thicknesses
- Patent number 8,460,996
- Issue date Jun 11, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Gauri V. Karve
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating dual-metal gate device
- Patent number 8,178,401
- Issue date May 15, 2012
- FREESCALE SEMICONDUCTOR, INC.
- David C. Gilmer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Separate layer formation in a semiconductor device
- Patent number 8,039,339
- Issue date Oct 18, 2011
- FREESCALE SEMICONDUCTOR, INC.
- John M. Grant
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor embedded resistor generation
- Patent number 8,012,821
- Issue date Sep 6, 2011
- Samsung Electronics Co., Ltd.
- Choongryul Ryou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS process with optimized PMOS and NMOS transistor devices
- Patent number 8,003,454
- Issue date Aug 23, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Da Zhang
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
FIN-BASED SCHOTTKY DIODE FOR INTEGRATED CIRCUIT (IC) PRODUCTS AND M...
- Publication number 20210175370
- Publication date Jun 10, 2021
- GLOBALFOUNDRIES U.S. Inc.
- Jagar Singh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH DOPED REGION ADJACENT ISOLATION STRUCTURE...
- Publication number 20210126126
- Publication date Apr 29, 2021
- GLOBALFOUNDRIES U.S. Inc.
- Jagar Singh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH VOLTAGE TRANSISTOR WITH FIN SOURCE/DRAIN REGIONS AND TRENCH GA...
- Publication number 20210036108
- Publication date Feb 4, 2021
- GLOBALFOUNDRIES INC.
- Jagar SINGH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING SHORT-CHANNEL AND LONG-CHANNEL TRANSISTOR DEVICE...
- Publication number 20200273953
- Publication date Aug 27, 2020
- GLOBALFOUNDRIES INC.
- Tao Chu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FIN-TYPE FIELD EFFECT TRANSISTORS WITH UNIFORM CHANNEL LENGTHS AND...
- Publication number 20200044069
- Publication date Feb 6, 2020
- GLOBALFOUNDRIES INC.
- Julien Frougier
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NOVEL APPROACH TO IMPROVE SDB DEVICE PERFORMANCE
- Publication number 20180337033
- Publication date Nov 22, 2018
- GLOBALFOUNDRIES INC.
- Shesh Mani PANDEY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FINFET DEVICE AND METHOD OF MANUFACTURING
- Publication number 20180233415
- Publication date Aug 16, 2018
- GLOBALFOUNDRIES INC.
- Shesh Mani PANDEY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR DEVICE STRUCTURES WITH RETROGRADE WELLS IN CMOS APPLICAT...
- Publication number 20180047641
- Publication date Feb 15, 2018
- GLOBALFOUNDRIES INC.
- Vara G. Reddy Vakada
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FINFET DEVICE AND METHOD OF MANUFACTURING
- Publication number 20180040516
- Publication date Feb 8, 2018
- GLOBALFOUNDRIES INC.
- Shesh Mani PANDEY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING SOURCE/DRAIN REGIONS ON FINFET DEVICES
- Publication number 20170294522
- Publication date Oct 12, 2017
- GLOBALFOUNDRIES INC.
- Shesh Mani Pandey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL THREE-DIMENSIONAL AND RF SEMICONDUCTOR DEVICES USING LOCAL SOI
- Publication number 20160118414
- Publication date Apr 28, 2016
- GLOBALFOUNDRIES INC.
- Jagar SINGH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING TRANSISTORS WITH RETROGRADE WELLS IN CMOS APPLIC...
- Publication number 20160035630
- Publication date Feb 4, 2016
- GLOBALFOUNDRIES INC.
- Vara G. Reddy Vakada
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICES WITH A REPLACEMENT GATE STRUCTURE HAVING A RE...
- Publication number 20150270346
- Publication date Sep 24, 2015
- GLOBALFOUNDRIES INC.
- Kuldeep Amarnath
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BLANKET EPI SUPER STEEP RETROGRADE WELL FORMATION WITHOUT Si RECESS
- Publication number 20150249129
- Publication date Sep 3, 2015
- GLOBALFOUNDRIES INC.
- Laegu KANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT HAVING MULTIPLE THRESHOLD VOLTAGES
- Publication number 20150243563
- Publication date Aug 27, 2015
- GLOBALFOUNDRIES INC.
- Bongki LEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATION METHOD FOR FABRICATION OF METAL GATE BASED MULTIPLE THR...
- Publication number 20150243652
- Publication date Aug 27, 2015
- GLOBALFOUNDRIES INC.
- Manoj JOSHI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS WITH VARYING GATE STRUCTURES AND FABRICATION ME...
- Publication number 20150243658
- Publication date Aug 27, 2015
- GLOBALFOUNDRIES INC.
- Manoj JOSHI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EPITAXIALLY FORMING A SET OF FINS IN A SEMICONDUCTOR DEVICE
- Publication number 20150221770
- Publication date Aug 6, 2015
- GLOBALFOUNDRIES INC.
- Johannes M. van Meer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING STEP DOPING CHANNEL PROFILE FOR SUPER STEEP RETRO...
- Publication number 20150053981
- Publication date Feb 26, 2015
- GLOBALFOUNDRIES INC.
- Vara Govindeswara Reddy Vakada
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EXTRA NARROW DIFFUSION BREAK FOR 3D FINFET TECHNOLOGIES
- Publication number 20150050792
- Publication date Feb 19, 2015
- GLOBALFOUNDRIES INC.
- Srikanth B. Samavedam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EPITAXIALLY FORMING A SET OF FINS IN A SEMICONDUCTOR DEVICE
- Publication number 20150037945
- Publication date Feb 5, 2015
- GLOBALFOUNDRIES INC.
- Johannes M. van Meer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING TRANSISTORS WITH RETROGRADE WELLS IN CMOS APPLIC...
- Publication number 20140367787
- Publication date Dec 18, 2014
- Vara G. Reddy Vakada
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING STEP DOPING CHANNEL PROFILE FOR SUPER STEEP RETRO...
- Publication number 20140197411
- Publication date Jul 17, 2014
- GLOBAL FOUNDERIES INC.
- Vara Govindeswara Reddy VAKADA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF USING A TRENCH SALICIDE ROUTING LAYER
- Publication number 20140183638
- Publication date Jul 3, 2014
- GLOBALFOUNDRIES INC.
- Mahbub RASHED
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BLANKET EPI SUPER STEEP RETROGRADE WELL FORMATION WITHOUT Si RECESS
- Publication number 20140183551
- Publication date Jul 3, 2014
- GLOBALFOUNDRIES INC.
- Laegu Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REPLACEMENT METAL GATE STRUCTURE FOR CMOS DEVICE
- Publication number 20140131808
- Publication date May 15, 2014
- GLOBAL FOUNDRIES Inc.
- Takashi Ando
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF TAILORING SILICON TRENCH PROFILE FOR SUPER STEEP RETROGRA...
- Publication number 20140070358
- Publication date Mar 13, 2014
- GLOBALFOUNDRIES INC.
- Yi Qi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING REPLACEMENT GATE STRUCTURES WITH A RECESSED CHANNEL
- Publication number 20130248985
- Publication date Sep 26, 2013
- GLOBALFOUNDRIES INC.
- Kuldeep Amarnath
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICES WITH DIFFERENT DIELECTRIC THICKNESSES
- Publication number 20130249015
- Publication date Sep 26, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Gauri V. Karve
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING BULK FINFET DEVICES WITH REPLACEMENT GATES SO AS...
- Publication number 20130224945
- Publication date Aug 29, 2013
- GLOBALFOUNDRIES INC.
- Yanxiang Liu
- H01 - BASIC ELECTRIC ELEMENTS

Srikanth B. Samavedam

Person

Patents Grantslast 30 patents

Fin-based Schottky diode for integrated circuit (IC) products and m...

Semiconductor device with doped region adjacent isolation structure...

High voltage transistor with fin source/drain regions and trench ga...

Fin-type field effect transistors with uniform channel lengths and...

Transistor device structures with retrograde wells in CMOS applicat...

Methods of forming source/drain regions on FinFET devices

FinFET device and method of manufacturing

SRAM cell having dual pass gate transistors and method of making th...

Methods of forming transistors with retrograde wells in CMOS applic...

Integrated circuits with varying gate structures and fabrication me...

Dual three-dimensional and RF semiconductor devices using local SOI

Integration method for fabrication of metal gate based multiple thr...

Epitaxially forming a set of fins in a semiconductor device

Integrated circuit having multiple threshold voltages

Semiconductor devices with different dielectric thicknesses

Blanket EPI super steep retrograde well formation without Si recess

Methods of forming transistors with retrograde wells in CMOS applic...

Methods of using a trench salicide routing layer

Blanket EPI super steep retrograde well formation without Si recess

Methods of forming replacement gate structures with a recessed channel

Method of forming step doping channel profile for super steep retro...

Replacement metal gate structure for CMOS device

Epitaxially forming a set of fins in a semiconductor device

Method of forming step doping channel profile for super steep retro...

Methods of forming bulk FinFET devices with replacement gates so as...

Semiconductor devices with different dielectric thicknesses

Method for fabricating dual-metal gate device

Separate layer formation in a semiconductor device

Semiconductor embedded resistor generation

CMOS process with optimized PMOS and NMOS transistor devices

Patents Applicationslast 30 patents

FIN-BASED SCHOTTKY DIODE FOR INTEGRATED CIRCUIT (IC) PRODUCTS AND M...

SEMICONDUCTOR DEVICE WITH DOPED REGION ADJACENT ISOLATION STRUCTURE...

HIGH VOLTAGE TRANSISTOR WITH FIN SOURCE/DRAIN REGIONS AND TRENCH GA...

METHODS OF FORMING SHORT-CHANNEL AND LONG-CHANNEL TRANSISTOR DEVICE...

FIN-TYPE FIELD EFFECT TRANSISTORS WITH UNIFORM CHANNEL LENGTHS AND...

NOVEL APPROACH TO IMPROVE SDB DEVICE PERFORMANCE

FINFET DEVICE AND METHOD OF MANUFACTURING

TRANSISTOR DEVICE STRUCTURES WITH RETROGRADE WELLS IN CMOS APPLICAT...

FINFET DEVICE AND METHOD OF MANUFACTURING

METHODS OF FORMING SOURCE/DRAIN REGIONS ON FINFET DEVICES

DUAL THREE-DIMENSIONAL AND RF SEMICONDUCTOR DEVICES USING LOCAL SOI

METHODS OF FORMING TRANSISTORS WITH RETROGRADE WELLS IN CMOS APPLIC...

SEMICONDUCTOR DEVICES WITH A REPLACEMENT GATE STRUCTURE HAVING A RE...

BLANKET EPI SUPER STEEP RETROGRADE WELL FORMATION WITHOUT Si RECESS

INTEGRATED CIRCUIT HAVING MULTIPLE THRESHOLD VOLTAGES

INTEGRATION METHOD FOR FABRICATION OF METAL GATE BASED MULTIPLE THR...

INTEGRATED CIRCUITS WITH VARYING GATE STRUCTURES AND FABRICATION ME...

EPITAXIALLY FORMING A SET OF FINS IN A SEMICONDUCTOR DEVICE

METHOD OF FORMING STEP DOPING CHANNEL PROFILE FOR SUPER STEEP RETRO...

EXTRA NARROW DIFFUSION BREAK FOR 3D FINFET TECHNOLOGIES

EPITAXIALLY FORMING A SET OF FINS IN A SEMICONDUCTOR DEVICE

METHODS OF FORMING TRANSISTORS WITH RETROGRADE WELLS IN CMOS APPLIC...

METHOD OF FORMING STEP DOPING CHANNEL PROFILE FOR SUPER STEEP RETRO...

METHODS OF USING A TRENCH SALICIDE ROUTING LAYER

BLANKET EPI SUPER STEEP RETROGRADE WELL FORMATION WITHOUT Si RECESS

REPLACEMENT METAL GATE STRUCTURE FOR CMOS DEVICE

METHOD OF TAILORING SILICON TRENCH PROFILE FOR SUPER STEEP RETROGRA...

METHODS OF FORMING REPLACEMENT GATE STRUCTURES WITH A RECESSED CHANNEL

SEMICONDUCTOR DEVICES WITH DIFFERENT DIELECTRIC THICKNESSES

METHODS OF FORMING BULK FINFET DEVICES WITH REPLACEMENT GATES SO AS...