Srinivasa Rao Kothamasu

Person

Addanki Post & Mandal, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for decreasing leakage power consumption in po...
- Patent number 8,923,087
- Issue date Dec 30, 2014
- LSI Corporation
- Romeshkumar Bharatkumar Mehta
- G11 - INFORMATION STORAGE
Information Patent Grant
Proxy responder for handling anomalies in a hardware system
- Patent number 8,924,779
- Issue date Dec 30, 2014
- LSI Corporation
- George Wayne Nation
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arbitration circuitry for asynchronous memory accesses
- Patent number 8,904,221
- Issue date Dec 2, 2014
- LSI Corporation
- Sathappan Palaniappan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interconnect congestion reduction for memory-mapped peripherals
- Patent number 8,667,196
- Issue date Mar 4, 2014
- LSI Corporation
- Srinivasa Rao Kothamasu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for optimizing slave transaction ID width based o...
- Patent number 8,583,844
- Issue date Nov 12, 2013
- LSI Corporation
- Sakthivel Komarasamy Pullagoundapatti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for allocating transaction ID in a system with a...
- Patent number 8,533,377
- Issue date Sep 10, 2013
- LSI Corporation
- Venkat Rao Vallapaneni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Closed loop dynamic interconnect bus allocation method and architec...
- Patent number 8,527,684
- Issue date Sep 3, 2013
- LSI Corporation
- Srinivasa Rao Kothamasu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, circuit and method for improving system-on-chip bandwidth p...
- Patent number 8,504,756
- Issue date Aug 6, 2013
- LSI Corporation
- Srinivasa Rao Kothamasu
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Multiple Core Execution Trace Buffer
- Publication number 20150269054
- Publication date Sep 24, 2015
- LSI Corporation
- Srinivasa Rao Kothamasu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM TO REDUCE SYSTEM BOOT LOADER DOWNLOAD TIME FOR SP...
- Publication number 20140115229
- Publication date Apr 24, 2014
- LSI Corporation
- Srinivasa Rao Kothamasu
- G11 - INFORMATION STORAGE
Information Patent Application
Configurable Response Generator for Varied Regions of System Addres...
- Publication number 20140025852
- Publication date Jan 23, 2014
- LSI Corporation
- Sreenath Shambu Ramakrishna
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Electronic Storage System Architecture
- Publication number 20130314819
- Publication date Nov 28, 2013
- LSI Corporation
- Debjit Roy Choudhury
- G11 - INFORMATION STORAGE
Information Patent Application
Interconnect Congestion Reduction for Memory-Mapped Peripherals
- Publication number 20130290582
- Publication date Oct 31, 2013
- LSI Corporation
- Srinivasa Rao Kothamasu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Proxy Responder for Handling Anomalies in a Hardware System
- Publication number 20130262918
- Publication date Oct 3, 2013
- LSI Corporation
- George Wayne Nation
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Decreasing Leakage Power Consumption in Po...
- Publication number 20130191665
- Publication date Jul 25, 2013
- LSI Corporation
- Romeshkumar Bharatkumar Mehta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARBITRATION CIRCUITRY FOR ASYNCHRONOUS MEMORY ACCESSES
- Publication number 20130166938
- Publication date Jun 27, 2013
- LSI Corporation
- Sathappan Palaniappan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR INCREASING DEVICE ACCESS PERFORMANCE IN D...
- Publication number 20130111181
- Publication date May 2, 2013
- LSI Corporation
- Srinivasa Rao Kothamasu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR OPTIMIZING SLAVE TRANSACTION ID WIDTH BASED O...
- Publication number 20120311210
- Publication date Dec 6, 2012
- Sakthivel Komarasamy PULLAGOUNDAPATTI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR ALLOCATING TRANSACTION ID IN A SYSTEM WITH A...
- Publication number 20120303848
- Publication date Nov 29, 2012
- Venkat Rao Vallapaneni
- G06 - COMPUTING CALCULATING COUNTING

Srinivasa Rao Kothamasu

Person

Patents Grantslast 30 patents

Method and apparatus for decreasing leakage power consumption in po...

Proxy responder for handling anomalies in a hardware system

Arbitration circuitry for asynchronous memory accesses

Interconnect congestion reduction for memory-mapped peripherals

System and method for optimizing slave transaction ID width based o...

System and method for allocating transaction ID in a system with a...

Closed loop dynamic interconnect bus allocation method and architec...

System, circuit and method for improving system-on-chip bandwidth p...

Patents Applicationslast 30 patents

Multiple Core Execution Trace Buffer

METHOD AND SYSTEM TO REDUCE SYSTEM BOOT LOADER DOWNLOAD TIME FOR SP...

Configurable Response Generator for Varied Regions of System Addres...

Electronic Storage System Architecture

Interconnect Congestion Reduction for Memory-Mapped Peripherals

Proxy Responder for Handling Anomalies in a Hardware System

Method and Apparatus for Decreasing Leakage Power Consumption in Po...

ARBITRATION CIRCUITRY FOR ASYNCHRONOUS MEMORY ACCESSES

METHODS AND APPARATUS FOR INCREASING DEVICE ACCESS PERFORMANCE IN D...

SYSTEM AND METHOD FOR OPTIMIZING SLAVE TRANSACTION ID WIDTH BASED O...

SYSTEM AND METHOD FOR ALLOCATING TRANSACTION ID IN A SYSTEM WITH A...