Stefanos Sidiropoulos

Person

Palo Alto, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Differential clock skew detector
- Patent number 11,341,002
- Issue date May 24, 2022
- Cadence Design Systems, Inc.
- Mehran Mohammadi Izad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory component with pattern register circuitry to provide data pa...
- Patent number 11,232,827
- Issue date Jan 25, 2022
- Highlands, LLC
- Craig E. Hampel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory component with pattern register circuitry to provide data pa...
- Patent number 10,811,080
- Issue date Oct 20, 2020
- RAMBUS INC.
- Craig E. Hampel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flash memory controller with calibrated data communication
- Patent number 10,310,999
- Issue date Jun 4, 2019
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory component with pattern register circuitry to provide data pa...
- Patent number 10,192,609
- Issue date Jan 29, 2019
- Rambus Inc.
- Craig E. Hampel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-PAM output driver with distortion compensation
- Patent number 9,998,305
- Issue date Jun 12, 2018
- Rambus Inc.
- Jared L. Zerbe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Timing-modulated side channel
- Patent number 9,917,655
- Issue date Mar 13, 2018
- Cadence Design Systems, Inc.
- Athanasios Kasapi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Memory controller that calibrates a transmit timing offset
- Patent number 9,785,589
- Issue date Oct 10, 2017
- Rambus Inc.
- Jared LeVan Zerbe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Memory component with pattern register circuitry to provide data pa...
- Patent number 9,721,642
- Issue date Aug 1, 2017
- Rambus Inc.
- Craig E. Hampel
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multiphase receiver with equalization circuitry
- Patent number 9,544,169
- Issue date Jan 10, 2017
- Rambus Inc.
- Jared L. Zerbe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Adaptable rate transceiver
- Patent number 9,515,694
- Issue date Dec 6, 2016
- nusemi inc.
- Stefanos Sidiropoulos
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Flash memory controller with calibrated data communication
- Patent number 9,405,678
- Issue date Aug 2, 2016
- Rambus Inc.
- Jared LeVan Zerbe
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory component with pattern register circuitry to provide data pa...
- Patent number 9,367,248
- Issue date Jun 14, 2016
- Rambus Inc.
- Craig E. Hampel
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system with calibrated data communication
- Patent number 9,164,933
- Issue date Oct 20, 2015
- Rambus Inc.
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory component with pattern register circuitry to provide data pa...
- Patent number 9,123,433
- Issue date Sep 1, 2015
- Rambus Inc.
- Craig E. Hampel
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory component with pattern register circuitry to provide data pa...
- Patent number 9,099,194
- Issue date Aug 4, 2015
- Rambus Inc.
- Craig E. Hampel
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-value logic signaling in multi-functional circuits
- Patent number 9,094,020
- Issue date Jul 28, 2015
- Broadcom Corporation
- Marc Loinaz
- G01 - MEASURING TESTING
Information Patent Grant
Systems, circuits and methods for filtering signals to compensate f...
- Patent number 8,948,331
- Issue date Feb 3, 2015
- Netlogic Microsystems, Inc.
- Halil Cirit
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Memory controller with circuitry to set memory device-specific refe...
- Patent number 8,948,212
- Issue date Feb 3, 2015
- Rambus Inc.
- Jared LeVan Zerbe
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatus to increase the resolution of a clock synthes...
- Patent number 8,667,038
- Issue date Mar 4, 2014
- NetLogic Microsystems, Inc.
- Stefanos Sidiropoulos
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Repeate architecture with single clock multiplier unit
- Patent number 8,638,896
- Issue date Jan 28, 2014
- NetLogic Microsystems, Inc.
- Dean Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multiphase receiver with equalization circuitry
- Patent number 8,634,452
- Issue date Jan 21, 2014
- Rambus Inc.
- Jared L. Zerbe
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system with calibrated data communication
- Patent number 8,630,317
- Issue date Jan 14, 2014
- Rambus Inc.
- Jared LeVan Zerbe
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems, circuits, and methods for a sigma-delta based time to digi...
- Patent number 8,618,967
- Issue date Dec 31, 2013
- Broadcom Corporation
- Parastoo Nikaeen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods and apparatus for clock and data recovery using transmissio...
- Patent number 8,599,983
- Issue date Dec 3, 2013
- NetLogic Microsystems, Inc.
- Stefanos Sidiropoulos
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Systems, circuits, and methods for a digital frequency synthesizer
- Patent number 8,552,767
- Issue date Oct 8, 2013
- Broadcom Corporation
- Parastoo Nikaeen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase adjustment apparatus and method for a memory device signaling...
- Patent number 8,542,787
- Issue date Sep 24, 2013
- Rambus Inc.
- Craig E. Hampel
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems, circuits and methods for filtering signals to compensate f...
- Patent number 8,537,949
- Issue date Sep 17, 2013
- Netlogic Microsystems, Inc.
- Halil Cirit
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multi-value logic signaling in multi-functional circuits
- Patent number 8,520,744
- Issue date Aug 27, 2013
- NetLogic Microsystems, Inc.
- Marc Loinaz
- G01 - MEASURING TESTING
Information Patent Grant
Methods and apparatus for frequency synthesis with feedback interpo...
- Patent number 8,433,018
- Issue date Apr 30, 2013
- Netlogic Microsystems, Inc.
- Stefanos Sidiropoulos
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
MEMORY COMPONENT WITH PATTERN REGISTER CIRCUITRY TO PROVIDE DATA PA...
- Publication number 20210098048
- Publication date Apr 1, 2021
- Rambus Inc.
- Craig E. Hampel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY COMPONENT WITH PATTERN REGISTER CIRCUITRY TO PROVIDE DATA PA...
- Publication number 20190214074
- Publication date Jul 11, 2019
- RAMBUS INC.
- Craig E. Hampel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLASH MEMORY CONTROLLER WITH CALIBRATED DATA COMMUNICATION
- Publication number 20180095916
- Publication date Apr 5, 2018
- RAMBUS INC.
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY COMPONENT WITH PATTERN REGISTER CIRCUITRY TO PROVIDE DATA PA...
- Publication number 20180012643
- Publication date Jan 11, 2018
- RAMBUS INC.
- Craig E. Hampel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-PAM Output Driver with Distortion Compensation
- Publication number 20170222845
- Publication date Aug 3, 2017
- RAMBUS INC.
- Jared L. Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLASH MEMORY CONTROLLER WITH CALIBRATED DATA COMMUNICATION
- Publication number 20170031854
- Publication date Feb 2, 2017
- RAMBUS INC.
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY COMPONENT WITH PATTERN REGISTER CIRCUITRY TO PROVIDE DATA PA...
- Publication number 20160260469
- Publication date Sep 8, 2016
- RAMBUS INC.
- Craig E. Hampel
- G11 - INFORMATION STORAGE
Information Patent Application
FLASH MEMORY CONTROLLER WITH CALIBRATED DATA COMMUNICATION
- Publication number 20160011973
- Publication date Jan 14, 2016
- RAMBUS INC.
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY COMPONENT WITH PATTERN REGISTER CIRCUITRY TO PROVIDE DATA PA...
- Publication number 20150286408
- Publication date Oct 8, 2015
- RAMBUS INC.
- Craig E. Hampel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory System with Calibrated Data Communication
- Publication number 20150169478
- Publication date Jun 18, 2015
- RAMBUS INC.
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiphase Receiver with Equalization Circuitry
- Publication number 20140286389
- Publication date Sep 25, 2014
- RAMBUS INC.
- Jared L. Zerbe
- G11 - INFORMATION STORAGE
Information Patent Application
Memory System with Calibrated Data Communication
- Publication number 20140229667
- Publication date Aug 14, 2014
- RAMBUS INC.
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Component with Pattern Register Circuitry to Provide Data Pa...
- Publication number 20140032830
- Publication date Jan 30, 2014
- RAMBUS INC.
- Craig E. Hampel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Component with Pattern Register Circuitry to Provide Data Pa...
- Publication number 20130346685
- Publication date Dec 26, 2013
- RAMBUS INC.
- Craig E. Hampel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems, Circuits and Methods for Filtering Signals to Compensate f...
- Publication number 20130287409
- Publication date Oct 31, 2013
- Halil CIRIT
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Multi-Value Logic Signaling in Multi-Functional Circuits
- Publication number 20130285736
- Publication date Oct 31, 2013
- Marc LOINAZ
- G01 - MEASURING TESTING
Information Patent Application
SYSTEMS, CIRCUITS, AND METHODS FOR A DIGITAL FREQUENCY SYNTHESIZER
- Publication number 20130257485
- Publication date Oct 3, 2013
- BROADCOM CORPORATION
- Parastoo Nikaeen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Systems, Circuits, and Methods for a Sigma-Delta Based Time to Digi...
- Publication number 20130257494
- Publication date Oct 3, 2013
- BROADCOM CORPORATION
- Parastoo Nikaeen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Multiphase receiver with equalization circuitry
- Publication number 20130010855
- Publication date Jan 10, 2013
- Jared L. Zerbe
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND APPARATUS FOR CLOCK AND DATA RECOVERY USING TRANSMISSIO...
- Publication number 20120230450
- Publication date Sep 13, 2012
- Stefanos Sidiropoulos
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Memory System with Calibrated Data Communication
- Publication number 20120204054
- Publication date Aug 9, 2012
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Phase Adjustment Apparatus and Method for a Memory Device Signaling...
- Publication number 20110248761
- Publication date Oct 13, 2011
- Craig E. Hampel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Repeater Architecture with Single Clock Multiplier Unit
- Publication number 20110228889
- Publication date Sep 22, 2011
- Dean Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Multi-Value Logic Signaling in Multi-Functional Circuits
- Publication number 20110228860
- Publication date Sep 22, 2011
- Marc Loinaz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATING RECEIVER WITH PRECHARGE CIRCUITRY
- Publication number 20110140741
- Publication date Jun 16, 2011
- Jared L. Zerbe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Systems, Methods, and Circuits for Driving Large Off-Chip Loads
- Publication number 20110103417
- Publication date May 5, 2011
- Stefanos Sidiropoulos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Apparatus and Method for Controlling a Master/Slave System via Mast...
- Publication number 20100146172
- Publication date Jun 10, 2010
- Stefanos Sidiropoulos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Low Latency Multi-Level Communication Interface
- Publication number 20100134153
- Publication date Jun 3, 2010
- Jared L. Zerbe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Memory System with Calibrated Data Communication
- Publication number 20090327789
- Publication date Dec 31, 2009
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System Having A Controller Device, A Buffer Device And A Plurality...
- Publication number 20090319719
- Publication date Dec 24, 2009
- RAMBUS INC.
- Richard E. Perego
- G06 - COMPUTING CALCULATING COUNTING

Stefanos Sidiropoulos

Person

Patents Grantslast 30 patents

Differential clock skew detector

Memory component with pattern register circuitry to provide data pa...

Memory component with pattern register circuitry to provide data pa...

Flash memory controller with calibrated data communication

Memory component with pattern register circuitry to provide data pa...

Multi-PAM output driver with distortion compensation

Timing-modulated side channel

Memory controller that calibrates a transmit timing offset

Memory component with pattern register circuitry to provide data pa...

Multiphase receiver with equalization circuitry

Adaptable rate transceiver

Flash memory controller with calibrated data communication

Memory component with pattern register circuitry to provide data pa...

Memory system with calibrated data communication

Memory component with pattern register circuitry to provide data pa...

Memory component with pattern register circuitry to provide data pa...

Multi-value logic signaling in multi-functional circuits

Systems, circuits and methods for filtering signals to compensate f...

Memory controller with circuitry to set memory device-specific refe...

Methods and apparatus to increase the resolution of a clock synthes...

Repeate architecture with single clock multiplier unit

Multiphase receiver with equalization circuitry

Memory system with calibrated data communication

Systems, circuits, and methods for a sigma-delta based time to digi...

Methods and apparatus for clock and data recovery using transmissio...

Systems, circuits, and methods for a digital frequency synthesizer

Phase adjustment apparatus and method for a memory device signaling...

Systems, circuits and methods for filtering signals to compensate f...

Multi-value logic signaling in multi-functional circuits

Methods and apparatus for frequency synthesis with feedback interpo...

Patents Applicationslast 30 patents

MEMORY COMPONENT WITH PATTERN REGISTER CIRCUITRY TO PROVIDE DATA PA...

MEMORY COMPONENT WITH PATTERN REGISTER CIRCUITRY TO PROVIDE DATA PA...

FLASH MEMORY CONTROLLER WITH CALIBRATED DATA COMMUNICATION

MEMORY COMPONENT WITH PATTERN REGISTER CIRCUITRY TO PROVIDE DATA PA...

Multi-PAM Output Driver with Distortion Compensation

FLASH MEMORY CONTROLLER WITH CALIBRATED DATA COMMUNICATION

MEMORY COMPONENT WITH PATTERN REGISTER CIRCUITRY TO PROVIDE DATA PA...

FLASH MEMORY CONTROLLER WITH CALIBRATED DATA COMMUNICATION

MEMORY COMPONENT WITH PATTERN REGISTER CIRCUITRY TO PROVIDE DATA PA...

Memory System with Calibrated Data Communication

Multiphase Receiver with Equalization Circuitry

Memory System with Calibrated Data Communication

Memory Component with Pattern Register Circuitry to Provide Data Pa...

Memory Component with Pattern Register Circuitry to Provide Data Pa...

Systems, Circuits and Methods for Filtering Signals to Compensate f...

Multi-Value Logic Signaling in Multi-Functional Circuits

SYSTEMS, CIRCUITS, AND METHODS FOR A DIGITAL FREQUENCY SYNTHESIZER

Systems, Circuits, and Methods for a Sigma-Delta Based Time to Digi...

Multiphase receiver with equalization circuitry

METHODS AND APPARATUS FOR CLOCK AND DATA RECOVERY USING TRANSMISSIO...

Memory System with Calibrated Data Communication

Phase Adjustment Apparatus and Method for a Memory Device Signaling...

Repeater Architecture with Single Clock Multiplier Unit

Multi-Value Logic Signaling in Multi-Functional Circuits

INTEGRATING RECEIVER WITH PRECHARGE CIRCUITRY

Systems, Methods, and Circuits for Driving Large Off-Chip Loads

Apparatus and Method for Controlling a Master/Slave System via Mast...

Low Latency Multi-Level Communication Interface

Memory System with Calibrated Data Communication

System Having A Controller Device, A Buffer Device And A Plurality...