Stephen Paul Sample

Person

Saratoga, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Accelerator system for remote data storage
- Patent number 9,645,951
- Issue date May 9, 2017
- DRC Computer Corporation
- Michael H. Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Accelerator system for use with secure data storage
- Patent number 9,411,524
- Issue date Aug 9, 2016
- Security First Corp.
- Mark S. O'Hare
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Accelerator system for remote data storage
- Patent number 8,824,492
- Issue date Sep 2, 2014
- DRC Computer Corporation
- Michael H. Wang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Accelerator system for use with secure data storage
- Patent number 8,601,498
- Issue date Dec 3, 2013
- Security First Corp.
- Lawrence A. Laurich
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Configurable processor module accelerator using a programmable logi...
- Patent number 7,856,546
- Issue date Dec 21, 2010
- DRC Computer Corporation
- Steven Casselman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Emulation system with time-multiplexed interconnect
- Patent number 7,739,097
- Issue date Jun 15, 2010
- Quickturn Design Systems Inc.
- Stephen P. Sample
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-performance programmable logic architecture
- Patent number 6,882,176
- Issue date Apr 19, 2005
- Altera Corporation
- Kevin A. Norman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus for emulation of electronic systems
- Patent number 6,842,729
- Issue date Jan 11, 2005
- Quickturn Design Systems, Inc.
- Stephen P. Sample
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory circuit for use in hardware emulation system
- Patent number 6,732,068
- Issue date May 4, 2004
- Quickturn Design Systems Inc.
- Stephen P. Sample
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for dynamically testing electrical interconnect
- Patent number 6,694,464
- Issue date Feb 17, 2004
- Quickturn Design Systems, Inc.
- Barton L. Quayle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimized emulation and prototyping architecture
- Patent number 6,625,793
- Issue date Sep 23, 2003
- Quickturn Design Systems, Inc.
- Stephen P. Sample
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-performance programmable logic architecture
- Patent number 6,570,404
- Issue date May 27, 2003
- Altera Corporation
- Kevin A. Norman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for designing large standard-cell base integrated circuits
- Patent number 6,567,967
- Issue date May 20, 2003
- Monterey Design Systems, Inc.
- Yaacov I. Greidinger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for emulation of electronic hardware system
- Patent number 6,377,911
- Issue date Apr 23, 2002
- Quickturn Design Systems, Inc.
- Stephen P. Sample
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Emulation system with time-multiplexed interconnect
- Patent number 6,377,912
- Issue date Apr 23, 2002
- Quickturn Design Systems, Inc.
- Stephen P. Sample
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
PLD with on-chip memory having a shadow register
- Patent number 6,353,552
- Issue date Mar 5, 2002
- Altera Corporation
- Stephen P. Sample
- G11 - INFORMATION STORAGE
Information Patent Grant
FPGA with on-chip multiport memory
- Patent number 6,317,367
- Issue date Nov 13, 2001
- Altera Corporation
- Stephen P. Sample
- G11 - INFORMATION STORAGE
Information Patent Grant
Optimized emulation and prototyping architecture
- Patent number 6,289,494
- Issue date Sep 11, 2001
- Quickturn Design Systems, Inc.
- Stephen P. Sample
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
I/O buffer circuit with pin multiplexing
- Patent number 6,285,211
- Issue date Sep 4, 2001
- Altera Corporation
- Stephen P. Sample
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Input/output buffer with overcurrent protection circuit
- Patent number 6,259,588
- Issue date Jul 10, 2001
- Altera Corporation
- Stephen P. Sample
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic device with multi-port memory
- Patent number 6,219,284
- Issue date Apr 17, 2001
- Altera Corporation
- Stephen P. Sample
- G11 - INFORMATION STORAGE
Information Patent Grant
Look-up table based logic element with complete permutability of th...
- Patent number 6,184,707
- Issue date Feb 6, 2001
- Altera Corporation
- Kevin A. Norman
- G05 - CONTROLLING REGULATING
Information Patent Grant
Programmable logic device with multi-port memory
- Patent number 6,151,258
- Issue date Nov 21, 2000
- Quickturn Design Systems, Inc.
- Stephen P. Sample
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for design verification using emulation and si...
- Patent number 6,058,492
- Issue date May 2, 2000
- Quickturn Design Systems, Inc.
- Stephen P. Sample
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Input/output buffer with overcurrent protection circuit
- Patent number 6,034,857
- Issue date Mar 7, 2000
- Altera Corporation
- Stephen P. Sample
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
I/O buffer circuit with pin multiplexing
- Patent number 6,020,760
- Issue date Feb 1, 2000
- Altera Corporation
- Stephen P. Sample
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic device with multi-port memory
- Patent number 6,011,730
- Issue date Jan 4, 2000
- Altera Corporation
- Stephen P. Sample
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable logic device with multi-port memory
- Patent number 6,011,744
- Issue date Jan 4, 2000
- Altera Corporation
- Stephen P. Sample
- G11 - INFORMATION STORAGE
Information Patent Grant
Hardware logic emulation system
- Patent number 5,963,735
- Issue date Oct 5, 1999
- Quickturn Design Systems, Inc.
- Stephen P. Sample
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Emulation system with time-multiplexed interconnect
- Patent number 5,960,191
- Issue date Sep 28, 1999
- Quickturn Design Systems, Inc.
- Stephen P. Sample
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
ACCELERATOR SYSTEM FOR USE WITH SECURE DATA STORAGE
- Publication number 20140108726
- Publication date Apr 17, 2014
- SECURITY FIRST CORP.
- Lawrence A. Laurich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Accelerator System For Remote Data Storage
- Publication number 20110295967
- Publication date Dec 1, 2011
- DRC Computer Corporation
- Michael H. Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCELERATOR SYSTEM FOR USE WITH SECURE DATA STORAGE
- Publication number 20110296440
- Publication date Dec 1, 2011
- Security First Corp.
- Lawrence A. Laurich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Configurable Processor Module Accelerator Using A Programmable Logi...
- Publication number 20110066832
- Publication date Mar 17, 2011
- DRC Computer Corporation
- Steven Casselman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Configurable Processor Module Accelerator Using A Programmable Logi...
- Publication number 20080028187
- Publication date Jan 31, 2008
- DRC Computer Corporation
- Steven Casselman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Emulation system with time-multiplexed interconnect
- Publication number 20030074178
- Publication date Apr 17, 2003
- Quickturn Design Systems, Inc.
- Stephen P. Sample
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Distributed logic analyzer for use in a hardware logic emulation sy...
- Publication number 20020177990
- Publication date Nov 28, 2002
- Stephen P. Sample
- G01 - MEASURING TESTING
Information Patent Application
Memory circuit for use in hardware emulation system
- Publication number 20020161568
- Publication date Oct 31, 2002
- Quickturn Design Systems, Inc.
- Stephen P. Sample
- G01 - MEASURING TESTING
Information Patent Application
Apparatus for emulation of electponic hardware system specification
- Publication number 20020107682
- Publication date Aug 8, 2002
- Quickturn Design Systems, Inc.
- Stephen P. Sample
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Optimized emulation and prototyping architecture
- Publication number 20020095649
- Publication date Jul 18, 2002
- Quickturn Design Systems, Inc.
- Stephen P. Sample
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for designing large standard-cell based integrated circuits
- Publication number 20020087939
- Publication date Jul 4, 2002
- Yaacov I. Greidinger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for designing large standard-cell based integrated circuits
- Publication number 20020087940
- Publication date Jul 4, 2002
- Yaacov I. Greidinger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PLD with on-chip memory having a shadow
- Publication number 20010017793
- Publication date Aug 30, 2001
- Stephen Sample
- G11 - INFORMATION STORAGE

Stephen Paul Sample

Person

Patents Grantslast 30 patents

Accelerator system for remote data storage

Accelerator system for use with secure data storage

Accelerator system for remote data storage

Accelerator system for use with secure data storage

Configurable processor module accelerator using a programmable logi...

Emulation system with time-multiplexed interconnect

High-performance programmable logic architecture

Apparatus for emulation of electronic systems

Memory circuit for use in hardware emulation system

Method and apparatus for dynamically testing electrical interconnect

Optimized emulation and prototyping architecture

High-performance programmable logic architecture

Method for designing large standard-cell base integrated circuits

Apparatus for emulation of electronic hardware system

Emulation system with time-multiplexed interconnect

PLD with on-chip memory having a shadow register

FPGA with on-chip multiport memory

Optimized emulation and prototyping architecture

I/O buffer circuit with pin multiplexing

Input/output buffer with overcurrent protection circuit

Programmable logic device with multi-port memory

Look-up table based logic element with complete permutability of th...

Programmable logic device with multi-port memory

Method and apparatus for design verification using emulation and si...

Input/output buffer with overcurrent protection circuit

I/O buffer circuit with pin multiplexing

Programmable logic device with multi-port memory

Programmable logic device with multi-port memory

Hardware logic emulation system

Emulation system with time-multiplexed interconnect

Patents Applicationslast 30 patents

ACCELERATOR SYSTEM FOR USE WITH SECURE DATA STORAGE

Accelerator System For Remote Data Storage

ACCELERATOR SYSTEM FOR USE WITH SECURE DATA STORAGE

Configurable Processor Module Accelerator Using A Programmable Logi...

Configurable Processor Module Accelerator Using A Programmable Logi...

Emulation system with time-multiplexed interconnect

Distributed logic analyzer for use in a hardware logic emulation sy...

Memory circuit for use in hardware emulation system

Apparatus for emulation of electponic hardware system specification

Optimized emulation and prototyping architecture

Method for designing large standard-cell based integrated circuits

Method for designing large standard-cell based integrated circuits

PLD with on-chip memory having a shadow