Steve S. Chiang

Person

Saratoga, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods for depositing, releasing and packaging micro-electromechan...
- Patent number 7,671,428
- Issue date Mar 2, 2010
- Texas Instruments Incorporated
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Methods for depositing, releasing and packaging micro-electromechan...
- Patent number 7,655,492
- Issue date Feb 2, 2010
- Texas Instruments Incorporated
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Methods for depositing, releasing and packaging micro-electromechan...
- Patent number 7,586,668
- Issue date Sep 8, 2009
- Texas Instruments Incorporated
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Methods for depositing, releasing and packaging micro-electromechan...
- Patent number 7,573,111
- Issue date Aug 11, 2009
- Texas Instruments Incorporated
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Methods for depositing, releasing and packaging micro-electromechan...
- Patent number 7,449,358
- Issue date Nov 11, 2008
- Texas Instruments Incorporated
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Methods for depositing, releasing and packaging micro-electromechan...
- Patent number 7,307,775
- Issue date Dec 11, 2007
- Texas Instruments Incorporated
- Satayadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Methods for depositing, releasing and packaging micro-electromechan...
- Patent number 7,286,278
- Issue date Oct 23, 2007
- Texas Instruments Incorporated
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Methods for depositing, releasing and packaging micro-electromechan...
- Patent number 7,198,982
- Issue date Apr 3, 2007
- Texas Instruments Incorporated
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Methods for depositing, releasing and packaging micro-electromechan...
- Patent number 6,995,040
- Issue date Feb 7, 2006
- Reflectivity, Inc.
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Methods for depositing, releasing and packaging micro-electromechan...
- Patent number 6,995,034
- Issue date Feb 7, 2006
- Reflectivity, Inc.
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Methods for depositing, releasing and packaging micro-electromechan...
- Patent number 6,969,635
- Issue date Nov 29, 2005
- Reflectivity, Inc.
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Antifuse structure suitable for VLSI application
- Patent number 6,603,187
- Issue date Aug 5, 2003
- Actel Corporation
- Guobiao Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Antifuse structure suitable for VLSI application
- Patent number 6,111,302
- Issue date Aug 29, 2000
- Actel Corporation
- Guobiao Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ball grid array structure and method for packaging an integrated ci...
- Patent number 6,034,427
- Issue date Mar 7, 2000
- Prolinx Labs Corporation
- James J. D. Lan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for supporting one or more electronic components
- Patent number 5,987,744
- Issue date Nov 23, 1999
- Prolinx Labs Corporation
- James J. D. Lan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Antifuse interconnect between two conducting layers of a printed ci...
- Patent number 5,962,815
- Issue date Oct 5, 1999
- Prolinx Labs Corporation
- James J. D. Lan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Programmable/reprogrammable printed circuit board using fuse and/or...
- Patent number 5,917,229
- Issue date Jun 29, 1999
- Prolinx Labs Corporation
- Richard J. Nathan
- G01 - MEASURING TESTING
Information Patent Grant
Programmable/reprogrammable structure using fuses and antifuses
- Patent number 5,906,043
- Issue date May 25, 1999
- Prolinx Labs Corporation
- James J. D. Lan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method and structure to interconnect traces of two conductive layer...
- Patent number 5,906,042
- Issue date May 25, 1999
- Prolinx Labs Corporation
- James J. D. Lan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multilayer board having insulating isolation rings
- Patent number 5,872,338
- Issue date Feb 16, 1999
- Prolinx Labs Corporation
- James J. D. Lan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating an antifuse
- Patent number 5,856,234
- Issue date Jan 5, 1999
- Actel Corporation
- Steve S. Chiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Use of conductive particles in a nonconductive body as an integrate...
- Patent number 5,834,824
- Issue date Nov 10, 1998
- Prolinx Labs Corporation
- William H. Shepherd
- G01 - MEASURING TESTING
Information Patent Grant
Circuits for ESD Protection of metal to-metal antifuses during proc...
- Patent number 5,825,072
- Issue date Oct 20, 1998
- Actel Corporation
- Yeochung Yen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Programmable cable and cable adapter using fuses and antifuses
- Patent number 5,813,881
- Issue date Sep 29, 1998
- Prolinx Labs Corporation
- Richard J. Nathan
- G01 - MEASURING TESTING
Information Patent Grant
Programmable/reprogramable structure using fuses and antifuses
- Patent number 5,808,351
- Issue date Sep 15, 1998
- Prolinx Labs Corporation
- Richard J. Nathan
- G01 - MEASURING TESTING
Information Patent Grant
Ball grid array structure and method for packaging an integrated ci...
- Patent number 5,767,575
- Issue date Jun 16, 1998
- Prolinx Labs Corporation
- James J. D. Lan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device-under-test card for a burn-in board
- Patent number 5,726,482
- Issue date Mar 10, 1998
- Prolinx Labs Corporation
- Richard J. Nathan
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus including a programmable socket adapter for coupling an e...
- Patent number 5,572,409
- Issue date Nov 5, 1996
- Prolinx Labs Corporation
- Richard J. Nathan
- G01 - MEASURING TESTING
Information Patent Grant
Method and structure for programming fuses
- Patent number 5,537,108
- Issue date Jul 16, 1996
- Prolinx Labs Corporation
- Richard J. Nathan
- G01 - MEASURING TESTING
Information Patent Grant
Metal-to-metal antifuse including etch stop layer
- Patent number 5,525,830
- Issue date Jun 11, 1996
- Actel Corporation
- Wenn-Jei Chen
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Methods for Depositing, Releasing and Packaging Micro-Electromechan...
- Publication number 20080096313
- Publication date Apr 24, 2008
- TEXAS INSTRUMENTS INCORPORATED
- Satayadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Methods for depositing, releasing and packaging micro-electromechan...
- Publication number 20070001247
- Publication date Jan 4, 2007
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Methods for depositing, releasing and packaging micro-electromechan...
- Publication number 20050260792
- Publication date Nov 24, 2005
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Methods for depositing, releasing and packaging micro-electromechan...
- Publication number 20050260793
- Publication date Nov 24, 2005
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Methods for depositing, releasing and packaging micro-electromechan...
- Publication number 20050214976
- Publication date Sep 29, 2005
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Methods for depositing, releasing and packaging micro-electromechan...
- Publication number 20050191789
- Publication date Sep 1, 2005
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Methods for depositing, releasing and packaging micro-electromechan...
- Publication number 20050191790
- Publication date Sep 1, 2005
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Methods for depositing, releasing and packaging micro-electromechan...
- Publication number 20050181532
- Publication date Aug 18, 2005
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Methods for depositing, releasing and packaging micro-electromechan...
- Publication number 20050179982
- Publication date Aug 18, 2005
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Methods for depositing, releasing and packaging micro-electromechan...
- Publication number 20050180686
- Publication date Aug 18, 2005
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Methods for depositing, releasing and packaging micro-electromechan...
- Publication number 20050173711
- Publication date Aug 11, 2005
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Methods for depositing, releasing and packaging micro-electromechan...
- Publication number 20050170540
- Publication date Aug 4, 2005
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Methods for depositing, releasing and packaging micro-electromechan...
- Publication number 20050170614
- Publication date Aug 4, 2005
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Methods for depositing, releasing and packaging micro-electromechan...
- Publication number 20050170557
- Publication date Aug 4, 2005
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Methods for depositing, releasing and packaging micro-electromechan...
- Publication number 20050170547
- Publication date Aug 4, 2005
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Methods for depositing, releasing and packaging microelectromechani...
- Publication number 20050139940
- Publication date Jun 30, 2005
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Methods for depositing, releasing and packaging micro-electromechan...
- Publication number 20050074919
- Publication date Apr 7, 2005
- REFLECTIVITY, INC.
- Satayadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Methods for depositing, releasing and packaging micro-electromechan...
- Publication number 20050048688
- Publication date Mar 3, 2005
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Methods for depositing, releasing and packaging micro-electromechan...
- Publication number 20050042792
- Publication date Feb 24, 2005
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Methods for depositing, releasing and packaging micro-electromechan...
- Publication number 20030054588
- Publication date Mar 20, 2003
- REFLECTIVITY, INC., a California corporation
- Satyadev R. Patel
- B81 - MICRO-STRUCTURAL TECHNOLOGY

Steve S. Chiang

Person

Patents Grantslast 30 patents

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging micro-electromechan...

Antifuse structure suitable for VLSI application

Antifuse structure suitable for VLSI application

Ball grid array structure and method for packaging an integrated ci...

Method for supporting one or more electronic components

Antifuse interconnect between two conducting layers of a printed ci...

Programmable/reprogrammable printed circuit board using fuse and/or...

Programmable/reprogrammable structure using fuses and antifuses

Method and structure to interconnect traces of two conductive layer...

Multilayer board having insulating isolation rings

Method of fabricating an antifuse

Use of conductive particles in a nonconductive body as an integrate...

Circuits for ESD Protection of metal to-metal antifuses during proc...

Programmable cable and cable adapter using fuses and antifuses

Programmable/reprogramable structure using fuses and antifuses

Ball grid array structure and method for packaging an integrated ci...

Device-under-test card for a burn-in board

Apparatus including a programmable socket adapter for coupling an e...

Method and structure for programming fuses

Metal-to-metal antifuse including etch stop layer

Patents Applicationslast 30 patents

Methods for Depositing, Releasing and Packaging Micro-Electromechan...

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging microelectromechani...

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging micro-electromechan...

Methods for depositing, releasing and packaging micro-electromechan...