Subhash Gupta

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and system for providing inorganic vapor surface treatment f...
- Patent number 6,515,342
- Issue date Feb 4, 2003
- Advanced Micro Devices, Inc.
- Subhash Gupta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via structure in an integrated circuit utilizing a high conductivit...
- Patent number 6,331,732
- Issue date Dec 18, 2001
- Advanced Micro Devices, Inc.
- Subhash Gupta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for fabricating semiconductor device including antireflecti...
- Patent number 6,313,018
- Issue date Nov 6, 2001
- Advanced Micro Devices, Inc.
- Fei Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and system for patterning to enhance performance of a metal...
- Patent number 6,071,824
- Issue date Jun 6, 2000
- Advanced Micro Devices, Inc.
- Bhanwar Singh
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method and system for providing inorganic vapor surface treatment f...
- Patent number 6,066,578
- Issue date May 23, 2000
- Advanced Micro Devices, Inc.
- Subhash Gupta
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Subtractive dual damascene semiconductor device
- Patent number 6,051,882
- Issue date Apr 18, 2000
- Advanced Micro Devices
- Steven Avanzino
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device including antireflective etch stop layer
- Patent number 6,040,619
- Issue date Mar 21, 2000
- Advanced Micro Devices
- Fei Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a high conductivity metal interconnect using meta...
- Patent number 5,994,206
- Issue date Nov 30, 1999
- Advanced Micro Devices, Inc.
- Subhash Gupta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Surface modification method for film stress reduction
- Patent number 5,936,307
- Issue date Aug 10, 1999
- Advanced Micro Devices, Inc.
- Diana M. Schonauer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Run-to-run control process for controlling critical dimensions
- Patent number 5,926,690
- Issue date Jul 20, 1999
- Advanced Micro Devices, Inc.
- Anthony John Toprac
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Deep UV anti-reflection coating etch
- Patent number 5,910,453
- Issue date Jun 8, 1999
- Advanced Micro Devices, Inc.
- Subhash Gupta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fluted via formation for superior metal step coverage
- Patent number 5,841,196
- Issue date Nov 24, 1998
- Advanced Micro Devices, Inc.
- Subhash Gupta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metallization sidewall passivation technology for deep sub-half mic...
- Patent number 5,814,560
- Issue date Sep 29, 1998
- Advanced Micro Devices, Inc.
- Robin W. Cheung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self aligned via dual damascene
- Patent number 5,795,823
- Issue date Aug 18, 1998
- Advanced Micro Devices, Inc.
- Steven Avanzino
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Copper reservoir for reducing electromigration effects associated w...
- Patent number 5,770,519
- Issue date Jun 23, 1998
- Advanced Micro Devices, Inc.
- Richard K. Klein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fluted via formation for superior metal step coverage
- Patent number 5,746,884
- Issue date May 5, 1998
- Advanced Micro Devices, Inc.
- Subhash Gupta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual damascene with a sacrificial via fill
- Patent number 5,705,430
- Issue date Jan 6, 1998
- Advanced Micro Devices, Inc.
- Steven Avanzino
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Subtractive dual damascene
- Patent number 5,691,238
- Issue date Nov 25, 1997
- Advanced Micro Devices, Inc.
- Steven Avanzino
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual damascene with a protective mask for via etching
- Patent number 5,686,354
- Issue date Nov 11, 1997
- Advanced Micro Devices, Inc.
- Steven Avanzino
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Surface image transfer etching
- Patent number 5,658,440
- Issue date Aug 19, 1997
- Advanced Micro Devices Incorporated
- Michael K. Templeton
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Selective planarization apparatus
- Patent number 5,645,675
- Issue date Jul 8, 1997
- Advanced Micro Devices, Inc.
- Subhash Gupta
- B24 - GRINDING POLISHING
Information Patent Grant
Copper pellet for reducing electromigration effects associated with...
- Patent number 5,646,448
- Issue date Jul 8, 1997
- Advanced Micro Devices
- Richard K. Klein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Copper pellet for reducing electromigration effects associated with...
- Patent number 5,639,691
- Issue date Jun 17, 1997
- Advanced Micro Devices, Inc.
- Richard K. Klein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self aligned via dual damascene
- Patent number 5,614,765
- Issue date Mar 25, 1997
- Advanced Micro Devices, Inc.
- Steven Avanzino
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Highly selective high aspect ratio oxide etch method and products m...
- Patent number 5,468,340
- Issue date Nov 21, 1995
- Subhash Gupta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Plasma etch process
- Patent number 5,468,339
- Issue date Nov 21, 1995
- Advanced Micro Devices, Inc.
- Subhash Gupta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Etch stop layer using polymers for integrated circuits
- Patent number 5,395,796
- Issue date Mar 7, 1995
- Advanced Micro Devices, Inc.
- Jacob D. Haskell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Selective planarization method using regelation
- Patent number 5,348,615
- Issue date Sep 20, 1994
- Advanced Micro Devices, Inc.
- Subhash Gupta
- B24 - GRINDING POLISHING
Information Patent Grant
Electrical measurement of sidewall angle
- Patent number 5,308,740
- Issue date May 3, 1994
- Advanced Micro Devices, Inc.
- Michael K. Templeton
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Etch stop layer using polymers
- Patent number 5,198,298
- Issue date Mar 30, 1993
- Advanced Micro Devices, Inc.
- Jacob D. Haskell
- H01 - BASIC ELECTRIC ELEMENTS

Subhash Gupta

Person

Patents Grantslast 30 patents

Method and system for providing inorganic vapor surface treatment f...

Via structure in an integrated circuit utilizing a high conductivit...

Process for fabricating semiconductor device including antireflecti...

Method and system for patterning to enhance performance of a metal...

Method and system for providing inorganic vapor surface treatment f...

Subtractive dual damascene semiconductor device

Semiconductor device including antireflective etch stop layer

Method of forming a high conductivity metal interconnect using meta...

Surface modification method for film stress reduction

Run-to-run control process for controlling critical dimensions

Deep UV anti-reflection coating etch

Fluted via formation for superior metal step coverage

Metallization sidewall passivation technology for deep sub-half mic...

Self aligned via dual damascene

Copper reservoir for reducing electromigration effects associated w...

Fluted via formation for superior metal step coverage

Dual damascene with a sacrificial via fill

Subtractive dual damascene

Dual damascene with a protective mask for via etching

Surface image transfer etching

Selective planarization apparatus

Copper pellet for reducing electromigration effects associated with...

Copper pellet for reducing electromigration effects associated with...

Self aligned via dual damascene

Highly selective high aspect ratio oxide etch method and products m...

Plasma etch process

Etch stop layer using polymers for integrated circuits

Selective planarization method using regelation

Electrical measurement of sidewall angle

Etch stop layer using polymers