Subhrajit Bhattacharya

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Plainsboro, NJ, US

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Patents Grantslast 30 patents

Information Patent Grant
Verification of scheduling in the presence of loops using uninterpr...
- Patent number 7,383,166
- Issue date Jun 3, 2008
- NEC Corporation
- Pranav Ashar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Verification of scheduling in the presence of loops using uninterpr...
- Patent number 6,745,160
- Issue date Jun 1, 2004
- NEC Corporation
- Pranav Ashar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for verification of RTL generated from scheduled behavior in...
- Patent number 6,163,876
- Issue date Dec 19, 2000
- NEC USA, Inc.
- Pranav Ashar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low cost testing method for register transfer level circuits
- Patent number 5,748,647
- Issue date May 5, 1998
- NEC USA, Inc.
- Subhrajit Bhattacharya
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
Verification of scheduling in the presence of loops using uninterpr...
- Publication number 20040148150
- Publication date Jul 29, 2004
- NEC Corporation
- Pranav Ashar
- G06 - COMPUTING CALCULATING COUNTING