Subramani Kengeri

Person

Cupertino, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device with transistor local interconnects
- Patent number 12,148,702
- Issue date Nov 19, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with transistor local interconnects
- Patent number 11,444,031
- Issue date Sep 13, 2022
- GLOBALFOUNDRIES U.S. INC.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with transistor local interconnects
- Patent number 10,833,018
- Issue date Nov 10, 2020
- GLOBALFOUNDRIES Inc.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit having capacitor coupled with memory element
- Patent number 9,484,067
- Issue date Nov 1, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ching-Hao Shaw
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device with transistor local interconnects
- Patent number 9,355,910
- Issue date May 31, 2016
- GLOBALFOUNDRIES, INC.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of using a trench salicide routing layer
- Patent number 9,196,548
- Issue date Nov 24, 2015
- GLOBALFOUNDRIES Inc.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Middle-of-the-line constructs using diffusion contact structures
- Patent number 9,142,513
- Issue date Sep 22, 2015
- GLOBALFOUNDRIES Inc.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Measuring electrical resistance
- Patent number 9,053,780
- Issue date Jun 9, 2015
- TAIWAN SEMICONDUCTOR MANFACTURING COMPANY, LTD.
- Kuoyuan Hsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Middle-of-the-line constructs using diffusion contact structures
- Patent number 9,006,100
- Issue date Apr 14, 2015
- GLOBALFOUNDRIES Inc.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Providing capacitors to improve radiation hardening in memory elements
- Patent number 8,824,226
- Issue date Sep 2, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ching-Hao Shaw
- G11 - INFORMATION STORAGE
Information Patent Grant
Providing timing-closed FinFET designs from planar designs
- Patent number 8,689,154
- Issue date Apr 1, 2014
- GLOBALFOUNDRIES Inc.
- Mahbub Rashed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory building blocks and memory design using automatic design tools
- Patent number 8,631,365
- Issue date Jan 14, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Subramani Kengeri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor devices formed on a continuous active region with an...
- Patent number 8,618,607
- Issue date Dec 31, 2013
- GLOBALFOUNDRIES Inc.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having contact layer providing electrical conn...
- Patent number 8,598,633
- Issue date Dec 3, 2013
- GLOBALFOUNDRIES, INC.
- Marc Tarabbia
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with transistor local interconnects
- Patent number 8,581,348
- Issue date Nov 12, 2013
- GLOBALFOUNDRIES, INC.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory circuits, systems, and method of interleavng accesses thereof
- Patent number 8,547,779
- Issue date Oct 1, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kuoyuan Hsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Measuring electrical resistance
- Patent number 8,432,759
- Issue date Apr 30, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kuoyuan Hsu
- G11 - INFORMATION STORAGE
Information Patent Grant
No-disturb bit line write for improving speed of eDRAM
- Patent number 8,208,329
- Issue date Jun 26, 2012
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Subramani Kengeri
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory building blocks and memory design using automatic design tools
- Patent number 8,185,851
- Issue date May 22, 2012
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Subramani Kengeri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory circuits, systems, and method of interleaving accesses thereof
- Patent number 8,164,974
- Issue date Apr 24, 2012
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kuoyuan Hsu
- G11 - INFORMATION STORAGE
Information Patent Grant
No-disturb bit line write for improving speed of eDRAM
- Patent number 7,952,946
- Issue date May 31, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Subramani Kengeri
- G11 - INFORMATION STORAGE
Information Patent Grant
Write assist circuit for improving write margins of SRAM cells
- Patent number 7,898,875
- Issue date Mar 1, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Derek C. Tao
- G11 - INFORMATION STORAGE
Information Patent Grant
WAK devices in SRAM cells for improving VCCMIN
- Patent number 7,733,687
- Issue date Jun 8, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Subramani Kengeri
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM device with a power saving module controlled by word line signals
- Patent number 7,606,061
- Issue date Oct 20, 2009
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Subramani Kengeri
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for accelerated detection of weak bits in an SRAM...
- Patent number 7,298,659
- Issue date Nov 20, 2007
- Virage Logic Corporation
- Subramani Kengeri
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-port memory utilizing an array of single-port memory cells
- Patent number 7,251,186
- Issue date Jul 31, 2007
- Virage Logic Corporation
- Subramani Kengeri
- G11 - INFORMATION STORAGE
Information Patent Grant
Error checking and correcting for content addressable memories (CAMs)
- Patent number 7,200,793
- Issue date Apr 3, 2007
- Altera Corporation
- Subramani Kengeri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Split-bank architecture for high performance SDRAMs
- Patent number 6,459,647
- Issue date Oct 1, 2002
- Alliance Semiconductor
- Subramani Kengeri
- G11 - INFORMATION STORAGE
Information Patent Grant
2T dual-port DRAM in a pure logic process with non-destructive read...
- Patent number 6,452,834
- Issue date Sep 17, 2002
- Silicon Access Networks
- Subramani Kengeri
- G11 - INFORMATION STORAGE
Information Patent Grant
High performance multi-bank compact synchronous DRAM architecture
- Patent number 6,442,098
- Issue date Aug 27, 2002
- Alliance Semiconductor
- Subramani Kengeri
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS
- Publication number 20220367360
- Publication date Nov 17, 2022
- GLOBALFOUNDRIES U.S. Inc.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS
- Publication number 20210013150
- Publication date Jan 14, 2021
- GLOBALFOUNDRIES INC.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS
- Publication number 20190326219
- Publication date Oct 24, 2019
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS
- Publication number 20160268204
- Publication date Sep 15, 2016
- GLOBALFOUNDRIES INC.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FORMING GATE TIE BETWEEN ABUTTING CELLS AND RESULTING DEVICE
- Publication number 20150311122
- Publication date Oct 29, 2015
- GLOBALFOUNDRIES INC.
- Mahbub RASHED
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MIDDLE-OF-THE-LINE CONSTRUCTS USING DIFFUSION CONTACT STRUCTURES
- Publication number 20150187702
- Publication date Jul 2, 2015
- GLOBALFOUNDRIES INC.
- Mahbub RASHED
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CIRCUIT HAVING CAPACITOR COUPLED WITH MEMORY ELEMENT
- Publication number 20140339618
- Publication date Nov 20, 2014
- Ching-Hao SHAW
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS OF USING A TRENCH SALICIDE ROUTING LAYER
- Publication number 20140183638
- Publication date Jul 3, 2014
- GLOBALFOUNDRIES INC.
- Mahbub RASHED
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MIDDLE-OF-THE-LINE CONSTRUCTS USING DIFFUSION CONTACT STRUCTURES
- Publication number 20140042641
- Publication date Feb 13, 2014
- GLOBALFOUNDRIES INC.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICES FORMED ON A CONTINUOUS ACTIVE REGION WITH AN...
- Publication number 20140001563
- Publication date Jan 2, 2014
- GLOBALFOUNDRIES INC.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROVIDING TIMING-CLOSED FINFET DESIGNS FROM PLANAR DESIGNS
- Publication number 20130275935
- Publication date Oct 17, 2013
- GLOBALFOUNDRIES INC.
- Mahbub Rashed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEASURING ELECTRICAL RESISTANCE
- Publication number 20130223129
- Publication date Aug 29, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kuoyuan HSU
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20130181289
- Publication date Jul 18, 2013
- GLOBALFOUNDRIES INC.
- Marc Tarabbia
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS
- Publication number 20130146986
- Publication date Jun 13, 2013
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS
- Publication number 20130146982
- Publication date Jun 13, 2013
- GLOBALFOUNDRIES INC.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY BUILDING BLOCKS AND MEMORY DESIGN USING AUTOMATIC DESIGN TOOLS
- Publication number 20120213013
- Publication date Aug 23, 2012
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Subramani Kengeri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CIRCUITS, SYSTEMS, AND METHOD OF INTERLEAVNG ACCESSES THEREOF
- Publication number 20120176856
- Publication date Jul 12, 2012
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kuoyuan Hsu
- G11 - INFORMATION STORAGE
Information Patent Application
No-Disturb Bit Line Write for Improving Speed of eDRAM
- Publication number 20110199835
- Publication date Aug 18, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Subramani Kengeri
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY BUILDING BLOCKS AND MEMORY DESIGN USING AUTOMATIC DESIGN TOOLS
- Publication number 20110041109
- Publication date Feb 17, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Subramani Kengeri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEASURING ELECTRICAL RESISTANCE
- Publication number 20100329055
- Publication date Dec 30, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kuoyuan HSU
- G11 - INFORMATION STORAGE
Information Patent Application
PROVIDING CAPACITORS TO IMPROVE RADIATION HARDENING IN MEMORY ELEMENTS
- Publication number 20100254069
- Publication date Oct 7, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ching-Hao SHAW
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUITS, SYSTEMS, AND METHOD OF INTERLEAVING ACCESSES THEREOF
- Publication number 20100214857
- Publication date Aug 26, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kuoyuan Hsu
- G11 - INFORMATION STORAGE
Information Patent Application
Write Assist Circuit for Improving Write Margins of SRAM Cells
- Publication number 20090285010
- Publication date Nov 19, 2009
- Derek C. Tao
- G11 - INFORMATION STORAGE
Information Patent Application
WAK Devices in SRAM Cells for Improving VCCMIN
- Publication number 20090207675
- Publication date Aug 20, 2009
- Subramani Kengeri
- G11 - INFORMATION STORAGE
Information Patent Application
No-Disturb Bit Line Write for Improving Speed of eDRAM
- Publication number 20090141568
- Publication date Jun 4, 2009
- Subramani Kengeri
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM Device with a Power Saving Module Controlled by Word Line Signals
- Publication number 20090040858
- Publication date Feb 12, 2009
- TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY
- Subramani Kengeri
- G11 - INFORMATION STORAGE

Subramani Kengeri

Person

Patents Grantslast 30 patents

Semiconductor device with transistor local interconnects

Semiconductor device with transistor local interconnects

Semiconductor device with transistor local interconnects

Circuit having capacitor coupled with memory element

Semiconductor device with transistor local interconnects

Methods of using a trench salicide routing layer

Middle-of-the-line constructs using diffusion contact structures

Measuring electrical resistance

Middle-of-the-line constructs using diffusion contact structures

Providing capacitors to improve radiation hardening in memory elements

Providing timing-closed FinFET designs from planar designs

Memory building blocks and memory design using automatic design tools

Semiconductor devices formed on a continuous active region with an...

Semiconductor device having contact layer providing electrical conn...

Semiconductor device with transistor local interconnects

Memory circuits, systems, and method of interleavng accesses thereof

Measuring electrical resistance

No-disturb bit line write for improving speed of eDRAM

Memory building blocks and memory design using automatic design tools

Memory circuits, systems, and method of interleaving accesses thereof

No-disturb bit line write for improving speed of eDRAM

Write assist circuit for improving write margins of SRAM cells

WAK devices in SRAM cells for improving VCCMIN

SRAM device with a power saving module controlled by word line signals

Method and system for accelerated detection of weak bits in an SRAM...

Multi-port memory utilizing an array of single-port memory cells

Error checking and correcting for content addressable memories (CAMs)

Split-bank architecture for high performance SDRAMs

2T dual-port DRAM in a pure logic process with non-destructive read...

High performance multi-bank compact synchronous DRAM architecture

Patents Applicationslast 30 patents

SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS

SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS

SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS

SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS

FORMING GATE TIE BETWEEN ABUTTING CELLS AND RESULTING DEVICE

MIDDLE-OF-THE-LINE CONSTRUCTS USING DIFFUSION CONTACT STRUCTURES

CIRCUIT HAVING CAPACITOR COUPLED WITH MEMORY ELEMENT

METHODS OF USING A TRENCH SALICIDE ROUTING LAYER

MIDDLE-OF-THE-LINE CONSTRUCTS USING DIFFUSION CONTACT STRUCTURES

SEMICONDUCTOR DEVICES FORMED ON A CONTINUOUS ACTIVE REGION WITH AN...

PROVIDING TIMING-CLOSED FINFET DESIGNS FROM PLANAR DESIGNS

MEASURING ELECTRICAL RESISTANCE

SEMICONDUCTOR DEVICE

SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS

SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS

MEMORY BUILDING BLOCKS AND MEMORY DESIGN USING AUTOMATIC DESIGN TOOLS

MEMORY CIRCUITS, SYSTEMS, AND METHOD OF INTERLEAVNG ACCESSES THEREOF

No-Disturb Bit Line Write for Improving Speed of eDRAM

MEMORY BUILDING BLOCKS AND MEMORY DESIGN USING AUTOMATIC DESIGN TOOLS

MEASURING ELECTRICAL RESISTANCE

PROVIDING CAPACITORS TO IMPROVE RADIATION HARDENING IN MEMORY ELEMENTS

MEMORY CIRCUITS, SYSTEMS, AND METHOD OF INTERLEAVING ACCESSES THEREOF

Write Assist Circuit for Improving Write Margins of SRAM Cells

WAK Devices in SRAM Cells for Improving VCCMIN

No-Disturb Bit Line Write for Improving Speed of eDRAM

SRAM Device with a Power Saving Module Controlled by Word Line Signals