Sujoy Mitra

Person

Cupertino, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Hetergeneous method for determining module placement in FPGAs
- Patent number 6,457,164
- Issue date Sep 24, 2002
- Xilinx, Inc.
- L. James Hwang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for structured layout in a hardware description language
- Patent number 6,430,732
- Issue date Aug 6, 2002
- Xilinx, Inc.
- L. James Hwang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Context-sensitive self implementing modules
- Patent number 6,292,925
- Issue date Sep 18, 2001
- Xilinx, Inc.
- Eric F. Dellinger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for specifying routing in a logic module by direct module co...
- Patent number 6,260,182
- Issue date Jul 10, 2001
- Xilinx, Inc.
- Sundararajarao Mohan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Heterogeneous method for determining module placement in FPGAs
- Patent number 6,243,851
- Issue date Jun 5, 2001
- Xilinx, Inc.
- L. James Hwang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for constraining circuit element positions in structured lay...
- Patent number 6,237,129
- Issue date May 22, 2001
- Xilinx, Inc.
- Cameron D. Patterson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
FPGA modules parameterized by expressions
- Patent number 6,216,258
- Issue date Apr 10, 2001
- Xilinx, Inc.
- Sundararajarao Mohan
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Methods and media for utilizing symbolic expressions in circuit mod...
- Publication number 20010001881
- Publication date May 24, 2001
- Sundararajarao Mohan
- G06 - COMPUTING CALCULATING COUNTING

Sujoy Mitra

Person

Patents Grantslast 30 patents

Hetergeneous method for determining module placement in FPGAs

Method for structured layout in a hardware description language

Context-sensitive self implementing modules

Method for specifying routing in a logic module by direct module co...

Heterogeneous method for determining module placement in FPGAs

Method for constraining circuit element positions in structured lay...

FPGA modules parameterized by expressions

Patents Applicationslast 30 patents

Methods and media for utilizing symbolic expressions in circuit mod...