Susanto Tanary

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Interposer for semiconductor package
- Patent number 8,772,921
- Issue date Jul 8, 2014
- United Test & Assembly Center Ltd.
- Chin Hock Toh
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Interposer for semiconductor package
- Patent number 8,115,292
- Issue date Feb 14, 2012
- United Test & Assembly Center Ltd.
- Chin Hock Toh
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Thermally enhanced semiconductor package and method of producing th...
- Patent number 8,039,951
- Issue date Oct 18, 2011
- United Test & Assembly Center Ltd.
- Kolan Ravi Kanth
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked die packages
- Patent number 7,723,833
- Issue date May 25, 2010
- United Test & Assembly Center Ltd.
- Gaurav Mehta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Leadframe enhancement and method of producing a multi-row semicondu...
- Patent number 7,476,569
- Issue date Jan 13, 2009
- United Test & Assembly Center Ltd.
- Danny Vallejo Retuta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Leadframe enhancement and method of producing a multi-row semicondu...
- Patent number 7,375,416
- Issue date May 20, 2008
- United Test & Assembly Center Ltd.
- Danny Vallejo Retuta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Cavity chip package
- Patent number 7,339,278
- Issue date Mar 4, 2008
- United Test & Assembly Center Ltd.
- Henry Iksan
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
INTERPOSER FOR SEMICONDUCTOR PACKAGE
- Publication number 20120104628
- Publication date May 3, 2012
- United Test & Assembly Center Ltd.
- Chin Hock Toh
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
INTERPOSER FOR SEMICONDUCTOR PACKAGE
- Publication number 20100109142
- Publication date May 6, 2010
- United Test & Assembly Center Ltd.
- Chin Hock Toh
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
LEADFRAME ENHANCEMENT AND METHOD OF PRODUCING A MULTI-ROW SEMICONDU...
- Publication number 20080199985
- Publication date Aug 21, 2008
- UNITED TEST AND ASSEMBLY CENTER LTD.
- Danny Vallejo Retuta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stacked Die Packages
- Publication number 20080054435
- Publication date Mar 6, 2008
- United Test and Assembly Center, Ltd.
- Gaurav MEHTA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Leadframe enhancement and method of producing a multi-row semicondu...
- Publication number 20070246810
- Publication date Oct 25, 2007
- UNITED TEST AND ASSEMBLY TEST CENTER LTD.
- Danny Vallejo Retuta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Thermally enhanced semiconductor package and method of producing th...
- Publication number 20070164425
- Publication date Jul 19, 2007
- UNITED TEST AND ASSEMBLY CENTER LTD.
- Ravi Kanth Kolan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CAVITY CHIP PACKAGE
- Publication number 20070069371
- Publication date Mar 29, 2007
- United Test & Assembly Center Ltd.
- Henry IKSAN
- H01 - BASIC ELECTRIC ELEMENTS

Susanto Tanary

Person

Patents Grantslast 30 patents

Interposer for semiconductor package

Interposer for semiconductor package

Thermally enhanced semiconductor package and method of producing th...

Stacked die packages

Leadframe enhancement and method of producing a multi-row semicondu...

Leadframe enhancement and method of producing a multi-row semicondu...

Cavity chip package

Patents Applicationslast 30 patents

INTERPOSER FOR SEMICONDUCTOR PACKAGE

INTERPOSER FOR SEMICONDUCTOR PACKAGE

LEADFRAME ENHANCEMENT AND METHOD OF PRODUCING A MULTI-ROW SEMICONDU...

Stacked Die Packages

Leadframe enhancement and method of producing a multi-row semicondu...

Thermally enhanced semiconductor package and method of producing th...

CAVITY CHIP PACKAGE