Taewoo Kang

Person

Suwon-si, KR

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor packages including at least one supporting portion
- Patent number 11,715,697
- Issue date Aug 1, 2023
- Samsung Electronics Co., Ltd.
- Sungbum Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate processing apparatus and method of manufacture using the...
- Patent number 10,651,074
- Issue date May 12, 2020
- Samsung Electronics Co., Ltd.
- Kyoung Hwan Kim
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Method of manufacturing semiconductor package
- Patent number 9,922,897
- Issue date Mar 20, 2018
- Samsung Electronics Co., Ltd.
- Kyoung Hwan Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Solder joint flip chip interconnection having relief structure
- Patent number 9,773,685
- Issue date Sep 26, 2017
- STATS ChipPAC Pte. Ltd.
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Solder joint flip chip interconnection
- Patent number 9,373,573
- Issue date Jun 21, 2016
- STATS ChipPAC Pte. Ltd.
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming column interconnect stru...
- Patent number 8,901,734
- Issue date Dec 2, 2014
- STATS ChipPAC, Ltd.
- SungWon Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Solder joint flip chip interconnection
- Patent number 8,810,029
- Issue date Aug 19, 2014
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stackable integrated circuit package system
- Patent number 8,779,570
- Issue date Jul 15, 2014
- Stats Chippac Ltd.
- Seong Bo Shim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic system with expansion feature
- Patent number 8,703,541
- Issue date Apr 22, 2014
- Stats Chippac Ltd.
- Haengcheol Choi
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Solder joint flip chip interconnection having relief structure
- Patent number RE44761
- Issue date Feb 11, 2014
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- 438 - Semiconductor device manufacturing: process
Information Patent Grant
Solder joint flip chip interconnection
- Patent number RE44608
- Issue date Nov 26, 2013
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- 257 - Active solid-state devices
Information Patent Grant
Solder joint flip chip interconnection having relief structure
- Patent number RE44562
- Issue date Oct 29, 2013
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- 257 - Active solid-state devices
Information Patent Grant
Solder joint flip chip interconnection having relief structure
- Patent number 8,216,930
- Issue date Jul 10, 2012
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with lead frame and method of m...
- Patent number 8,211,746
- Issue date Jul 3, 2012
- Stats Chippac Ltd.
- Jong-Woo Ha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic system with expansion feature
- Patent number 8,178,392
- Issue date May 15, 2012
- Stats Chippac Ltd.
- Haengcheol Choi
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Semiconductor device and method of forming column interconnect stru...
- Patent number 8,173,536
- Issue date May 8, 2012
- STATS ChipPAC, Ltd.
- SungWon Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Solder joint flip chip interconnection
- Patent number 8,129,841
- Issue date Mar 6, 2012
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with side substrate having a top...
- Patent number 8,018,052
- Issue date Sep 13, 2011
- Stats Chippac Ltd.
- KyungOe Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with lead frame and method of m...
- Patent number 7,951,643
- Issue date May 31, 2011
- Stats Chippac Ltd.
- Jong-Woo Ha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Standoff height improvement for bumping technology using solder resist
- Patent number 7,875,495
- Issue date Jan 25, 2011
- STATS ChipPAC, Ltd.
- TaeWoo Kang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Solder joint flip chip interconnection having relief structure
- Patent number 7,659,633
- Issue date Feb 9, 2010
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Standoff height improvement for bumping technology using solder resist
- Patent number 7,615,865
- Issue date Nov 10, 2009
- STATS ChipPAC, Ltd.
- TaeWoo Kang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR PACKAGE
- Publication number 20230144388
- Publication date May 11, 2023
- Samsung Electronics Co., Ltd.
- Heungkyu KWON
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGES
- Publication number 20210183780
- Publication date Jun 17, 2021
- Samsung Electronics Co., Ltd.
- Sungbum KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUBSTRATE PROCESSING APPARATUS AND METHOD OF MANUFACTURE USING THE...
- Publication number 20180114714
- Publication date Apr 26, 2018
- Samsung Electronics Co., Ltd.
- KYOUNG HWAN KIM
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE
- Publication number 20180076108
- Publication date Mar 15, 2018
- Kyoung Hwan KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Solder Joint Flip Chip Interconnection
- Publication number 20140291839
- Publication date Oct 2, 2014
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
- Publication number 20140061890
- Publication date Mar 6, 2014
- Samsung Electronics Co., Ltd.
- Jung-Do Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Solder Joint Flip Chip Interconnection Having Relief Structure
- Publication number 20120273943
- Publication date Nov 1, 2012
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC SYSTEM WITH EXPANSION FEATURE
- Publication number 20120193132
- Publication date Aug 2, 2012
- Haengcheol Choi
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Semiconductor Device and Method of Forming Column Interconnect Stru...
- Publication number 20120187559
- Publication date Jul 26, 2012
- STATS ChipPAC, Ltd.
- SungWon Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Solder Joint Flip Chip Interconnection
- Publication number 20120133043
- Publication date May 31, 2012
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEAD FRAME AND METHOD OF M...
- Publication number 20110227206
- Publication date Sep 22, 2011
- Jong-Woo Ha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Column Interconnect Stru...
- Publication number 20110101518
- Publication date May 5, 2011
- STATS ChipPAC, Ltd.
- SungWon Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEAD FRAME AND METHOD OF M...
- Publication number 20100133665
- Publication date Jun 3, 2010
- Jong-Woo Ha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Solder Joint Flip Chip Interconnection Having Relief Structure
- Publication number 20100099222
- Publication date Apr 22, 2010
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Solder Joint Flip Chip Interconnection
- Publication number 20100065966
- Publication date Mar 18, 2010
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Standoff Height Improvement for Bumping Technology Using Solder Resist
- Publication number 20100022050
- Publication date Jan 28, 2010
- STATS ChipPAC, Ltd.
- TaeWoo KANG
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
STACKABLE INTEGRATED CIRCUIT PACKAGE SYSTEM
- Publication number 20090236731
- Publication date Sep 24, 2009
- Seong Bo Shim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SIDE SUBSTRATE
- Publication number 20090001545
- Publication date Jan 1, 2009
- KyungOe Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Standoff Height Improvement for Bumping Technology Using Solder Resist
- Publication number 20080293232
- Publication date Nov 27, 2008
- STATS ChipPAC, Ltd.
- TaeWoo KANG
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
ELECTRONIC SYSTEM WITH EXPANSION FEATURE
- Publication number 20080283998
- Publication date Nov 20, 2008
- Haengcheol Choi
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Solder joint flip chip interconnection having relief structure
- Publication number 20070241464
- Publication date Oct 18, 2007
- STATS ChipPAC Ltd.
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Solder joint flip chip interconnection
- Publication number 20070105277
- Publication date May 10, 2007
- STATS ChipPAC Ltd.
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS

Taewoo Kang

Person

Patents Grantslast 30 patents

Semiconductor packages including at least one supporting portion

Substrate processing apparatus and method of manufacture using the...

Method of manufacturing semiconductor package

Solder joint flip chip interconnection having relief structure

Solder joint flip chip interconnection

Semiconductor device and method of forming column interconnect stru...

Solder joint flip chip interconnection

Stackable integrated circuit package system

Electronic system with expansion feature

Solder joint flip chip interconnection having relief structure

Solder joint flip chip interconnection

Solder joint flip chip interconnection having relief structure

Solder joint flip chip interconnection having relief structure

Integrated circuit packaging system with lead frame and method of m...

Electronic system with expansion feature

Semiconductor device and method of forming column interconnect stru...

Solder joint flip chip interconnection

Integrated circuit package system with side substrate having a top...

Integrated circuit packaging system with lead frame and method of m...

Standoff height improvement for bumping technology using solder resist

Solder joint flip chip interconnection having relief structure

Standoff height improvement for bumping technology using solder resist

Patents Applicationslast 30 patents

SEMICONDUCTOR PACKAGE

SEMICONDUCTOR PACKAGES

SUBSTRATE PROCESSING APPARATUS AND METHOD OF MANUFACTURE USING THE...

METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE

Solder Joint Flip Chip Interconnection

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

Solder Joint Flip Chip Interconnection Having Relief Structure

ELECTRONIC SYSTEM WITH EXPANSION FEATURE

Semiconductor Device and Method of Forming Column Interconnect Stru...

Solder Joint Flip Chip Interconnection

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEAD FRAME AND METHOD OF M...

Semiconductor Device and Method of Forming Column Interconnect Stru...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEAD FRAME AND METHOD OF M...

Solder Joint Flip Chip Interconnection Having Relief Structure

Solder Joint Flip Chip Interconnection

Standoff Height Improvement for Bumping Technology Using Solder Resist

STACKABLE INTEGRATED CIRCUIT PACKAGE SYSTEM

INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SIDE SUBSTRATE

Standoff Height Improvement for Bumping Technology Using Solder Resist

ELECTRONIC SYSTEM WITH EXPANSION FEATURE

Solder joint flip chip interconnection having relief structure

Solder joint flip chip interconnection