Takuya Yasui

Person

Kyoto, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device and semiconductor device layout designing method
- Patent number 8,028,264
- Issue date Sep 27, 2011
- Panasonic Corporation
- Junichi Shimada
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for designing semiconductor integrated circuits having air g...
- Patent number 7,698,671
- Issue date Apr 13, 2010
- Panasonic Corporation
- Tsutomu Fujii
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automatic layout method of semiconductor integrated circuit
- Patent number 7,272,811
- Issue date Sep 18, 2007
- Matsushita Electric Industrial Co., Ltd.
- Keiichi Kurokawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Delay analysis method and design assist apparatus of semiconductor...
- Patent number 6,578,182
- Issue date Jun 10, 2003
- Matsushita Electric Industrial Co., Ltd.
- Keiichi Kurokawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Delay analysis method and design assist apparatus of semiconductor...
- Patent number 6,496,963
- Issue date Dec 17, 2002
- Matsushita Electric Industrial Co., Ltd.
- Keiichi Kurokawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock circuit and method of designing the same
- Patent number 6,473,890
- Issue date Oct 29, 2002
- Takuya Yasui
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
WIRING STRUCTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, AND ME...
- Publication number 20080197449
- Publication date Aug 21, 2008
- Takayuki ARAKI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND PROGRAM FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT,...
- Publication number 20080120583
- Publication date May 22, 2008
- Tsutomu Fujii
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor device and semiconductor device layout designing method
- Publication number 20070252258
- Publication date Nov 1, 2007
- Junichi Shimada
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Automatic layout method of semiconductor integrated circuit
- Publication number 20050155007
- Publication date Jul 14, 2005
- MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
- Keiichi Kurokawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor integrated circuit
- Publication number 20040183581
- Publication date Sep 23, 2004
- Matsushita Electric Industrial Co., Ltd.
- Takuya Yasui
- G01 - MEASURING TESTING
Information Patent Application
Delay analysis method and design assist apparatus of semiconductor...
- Publication number 20030070151
- Publication date Apr 10, 2003
- Matsushita Electric Industrial Co., Ltd.
- Keiichi Kurokawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Delay analysis method and design assist apparatus of semiconductor...
- Publication number 20020010900
- Publication date Jan 24, 2002
- Keiichi Kurokawa
- G06 - COMPUTING CALCULATING COUNTING

Takuya Yasui

Person

Patents Grantslast 30 patents

Semiconductor device and semiconductor device layout designing method

Method for designing semiconductor integrated circuits having air g...

Automatic layout method of semiconductor integrated circuit

Delay analysis method and design assist apparatus of semiconductor...

Delay analysis method and design assist apparatus of semiconductor...

Clock circuit and method of designing the same

Patents Applicationslast 30 patents

WIRING STRUCTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, AND ME...

METHOD AND PROGRAM FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT,...

Semiconductor device and semiconductor device layout designing method

Automatic layout method of semiconductor integrated circuit

Semiconductor integrated circuit

Delay analysis method and design assist apparatus of semiconductor...

Delay analysis method and design assist apparatus of semiconductor...