Terrance John Zittritsch

Person

Williston, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Programmable address decoder for field programmable memory array
- Patent number 6,130,854
- Issue date Oct 10, 2000
- International Business Machines Corporation
- Scott Whitney Gould
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of operating a field programmable memory array with a field...
- Patent number 6,118,707
- Issue date Sep 12, 2000
- International Business Machines Corporation
- Scott Whitney Gould
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Field programmable memory array
- Patent number 6,075,745
- Issue date Jun 13, 2000
- International Business Machines Corporation
- Scott Whitney Gould
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory cells for field programmable memory array
- Patent number 6,038,192
- Issue date Mar 14, 2000
- International Business Machines Corporation
- Kim P. N. Clinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selective connectivity between memory sub-arrays and a hierarchical...
- Patent number 6,023,421
- Issue date Feb 8, 2000
- International Business Machines Corporation
- Kim P. N. Clinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Field programmable memory array
- Patent number 5,949,719
- Issue date Sep 7, 1999
- International Business Machines Corporation
- Kim P. N. Clinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Field programmable memory array
- Patent number 5,914,906
- Issue date Jun 22, 1999
- International Business Machines Corporation
- Joseph Andrew Iadanza
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for layout and schematic generation for heterogen...
- Patent number 5,910,733
- Issue date Jun 8, 1999
- International Business Machines Corporation
- Allan Robert Bertolet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable inverter circuit used in a programmable logic cell
- Patent number 5,781,032
- Issue date Jul 14, 1998
- International Business Machines Corporation
- Allan Robert Bertolet
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic cell
- Patent number 5,748,009
- Issue date May 5, 1998
- International Business Machines Corporation
- Allan Robert Bertolet
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and system for layout and schematic generation for heterogen...
- Patent number 5,734,582
- Issue date Mar 31, 1998
- International Business Machines Corporation
- Allan Robert Bertolet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low skew multiplexer network and programmable array clock/reset app...
- Patent number 5,717,346
- Issue date Feb 10, 1998
- International Business Machines Corporation
- Scott Whitney Gould
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable array clock/reset resource
- Patent number 5,703,498
- Issue date Dec 30, 1997
- International Business Machines Corporation
- Scott Whitney Gould
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable array I/O-routing resource
- Patent number 5,671,432
- Issue date Sep 23, 1997
- International Business Machines Corporation
- Allan Robert Bertolet
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable array clock/reset resource
- Patent number 5,652,529
- Issue date Jul 29, 1997
- International Business Machines Corporation
- Scott Whitney Gould
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic cell having configurable gates and multiplexers
- Patent number 5,646,546
- Issue date Jul 8, 1997
- International Business Machines Corporation
- Allan Robert Bertolet
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
BiCMOS gate pull-down circuit
- Patent number 5,118,972
- Issue date Jun 2, 1992
- International Business Machines Corporation
- Larry Wissel
- H03 - BASIC ELECTRONIC CIRCUITRY

Terrance John Zittritsch

Person

Patents Grantslast 30 patents

Programmable address decoder for field programmable memory array

Method of operating a field programmable memory array with a field...

Field programmable memory array

Memory cells for field programmable memory array

Selective connectivity between memory sub-arrays and a hierarchical...

Field programmable memory array

Field programmable memory array

Method and system for layout and schematic generation for heterogen...

Programmable inverter circuit used in a programmable logic cell

Programmable logic cell

Method and system for layout and schematic generation for heterogen...

Low skew multiplexer network and programmable array clock/reset app...

Programmable array clock/reset resource

Programmable array I/O-routing resource

Programmable array clock/reset resource

Programmable logic cell having configurable gates and multiplexers

BiCMOS gate pull-down circuit