Terry Borer

Person

Toronto, CA

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for implementing soft constraints in tools use...
- Patent number 9,754,065
- Issue date Sep 5, 2017
- Altera Corporation
- Terry Borer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing compilation using multiple desi...
- Patent number 9,122,826
- Issue date Sep 1, 2015
- Altera Corporation
- Terry Borer
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for implementing soft constraints in tools use...
- Patent number 8,589,849
- Issue date Nov 19, 2013
- Altera Corporation
- Terry Borer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
M/A for performing incremental compilation using top-down and botto...
- Patent number 8,589,838
- Issue date Nov 19, 2013
- Altera Corporation
- Terry Borer
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for compiling intellectual property systems de...
- Patent number 8,370,776
- Issue date Feb 5, 2013
- Altera Corporation
- Kevin Chan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing incremental compilation using t...
- Patent number 8,250,505
- Issue date Aug 21, 2012
- Altera Corporation
- Terry Borer
- G01 - MEASURING TESTING
Information Patent Grant
Directed design space exploration
- Patent number 8,037,435
- Issue date Oct 11, 2011
- Altera Corporation
- Ian Chesal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing incremental compilation using t...
- Patent number 7,669,157
- Issue date Feb 23, 2010
- Altera Corporation
- Terry Borer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for automated sweeping of parameters in computer-aided d...
- Patent number 7,594,208
- Issue date Sep 22, 2009
- Altera Corporation
- Terry Borer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing layout-driven optimizations on...
- Patent number 7,594,204
- Issue date Sep 22, 2009
- Altera Corporation
- Deshanand Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing incremental compilation
- Patent number 7,464,362
- Issue date Dec 9, 2008
- Altera Corporation
- Terry Borer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing compound duplication of compone...
- Patent number 7,401,314
- Issue date Jul 15, 2008
- Altera Corporation
- Karl Schabas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for editing circuit design files to be compatible with a...
- Patent number 7,389,489
- Issue date Jun 17, 2008
- Altera Corporation
- Ian Chesal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Directed design space exploration
- Patent number 7,370,295
- Issue date May 6, 2008
- Altera Corporation
- Ian Chesal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing retiming on field programmable...
- Patent number 7,360,190
- Issue date Apr 15, 2008
- Altera Corporation
- Deshanand Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Leveraging combinations of synthesis, placement and incremental opt...
- Patent number 7,290,240
- Issue date Oct 30, 2007
- Altera Corporation
- Carolyn Lam-Leventis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing logic replication in field prog...
- Patent number 7,257,800
- Issue date Aug 14, 2007
- Altera Corporation
- Deshanand Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synthesis aware placement: a novel approach that combines knowledge...
- Patent number 7,254,801
- Issue date Aug 7, 2007
- Altera Corporation
- Terry Borer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for designing systems using logic regions
- Patent number 7,197,734
- Issue date Mar 27, 2007
- Altera Corporation
- Deshanand P. Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing soft constraints in tools use...
- Patent number 7,194,720
- Issue date Mar 20, 2007
- Altera Corporation
- Terry P. Borer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for automated sweeping of parameters in computer-aided d...
- Patent number 7,181,703
- Issue date Feb 20, 2007
- Altera Corporation
- Terry Borer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for placement of components onto programmable...
- Patent number 7,181,717
- Issue date Feb 20, 2007
- Altera Corporation
- Deshanand P. Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for placement of components onto programmable...
- Patent number 6,779,169
- Issue date Aug 17, 2004
- Altera Corporation
- Deshanand P. Singh
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Method and Apparatus for Implementing Soft Constraints in Tools Use...
- Publication number 20170337318
- Publication date Nov 23, 2017
- Altera Corporation
- Terry Borer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Implementing Soft Constraints in Tools Use...
- Publication number 20140047405
- Publication date Feb 13, 2014
- Altera Corporation
- Terry Borer
- G06 - COMPUTING CALCULATING COUNTING

Terry Borer

Person

Patents Grantslast 30 patents

Method and apparatus for implementing soft constraints in tools use...

Method and apparatus for performing compilation using multiple desi...

Method and apparatus for implementing soft constraints in tools use...

M/A for performing incremental compilation using top-down and botto...

Method and apparatus for compiling intellectual property systems de...

Method and apparatus for performing incremental compilation using t...

Directed design space exploration

Method and apparatus for performing incremental compilation using t...

Techniques for automated sweeping of parameters in computer-aided d...

Method and apparatus for performing layout-driven optimizations on...

Method and apparatus for performing incremental compilation

Method and apparatus for performing compound duplication of compone...

Techniques for editing circuit design files to be compatible with a...

Directed design space exploration

Method and apparatus for performing retiming on field programmable...

Leveraging combinations of synthesis, placement and incremental opt...

Method and apparatus for performing logic replication in field prog...

Synthesis aware placement: a novel approach that combines knowledge...

Method and apparatus for designing systems using logic regions

Method and apparatus for implementing soft constraints in tools use...

Techniques for automated sweeping of parameters in computer-aided d...

Method and apparatus for placement of components onto programmable...

Method and apparatus for placement of components onto programmable...

Patents Applicationslast 30 patents

Method and Apparatus for Implementing Soft Constraints in Tools Use...

Method and Apparatus for Implementing Soft Constraints in Tools Use...