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Terry D. Little
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Austin, TX, US
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last 30 patents
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Patent Grant
Linearized digital phase-locked loop
Patent number
6,993,105
Issue date
Jan 31, 2006
Cypress Semiconductor Corp.
Terry D. Little
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
Linearized digital phase-locked loop method
Patent number
6,950,484
Issue date
Sep 27, 2005
Cypress Semiconductor Corp.
Timothy D. Jordan
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
Linearized digital phase-locked loop
Patent number
6,711,226
Issue date
Mar 23, 2004
Cypress Semiconductor Corp.
Bertrand J. Williams
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
Programmable latch that avoids a non-desired output state
Patent number
6,549,050
Issue date
Apr 15, 2003
Cypress Semiconductor Corp.
Steven C. Meyers
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Linearized digital phase-locked loop
Patent number
6,366,145
Issue date
Apr 2, 2002
Cypress Semiconductor Corp.
Bertrand J. Williams
H04 - ELECTRIC COMMUNICATION TECHNIQUE