Thomas J. Krutsick

Person

Fleetwood, PA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Trench capacitor for high voltage processes and method of manufactu...
- Patent number 8,269,265
- Issue date Sep 18, 2012
- Microsemi Semiconductor (U.S.) Inc.
- Thomas J. Krutsick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of counter-doping collector regions in bipolar transistors
- Patent number 8,035,196
- Issue date Oct 11, 2011
- Zarlink Semiconductor (US) Inc.
- Thomas J. Krutsick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a light activated silicon controlled switch
- Patent number 8,012,775
- Issue date Sep 6, 2011
- Zarlink Semiconductor (US), Inc.
- Thomas Joseph Krutsick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Light activated silicon controlled switch
- Patent number 7,821,016
- Issue date Oct 26, 2010
- Zarlink Semiconductor (US) Inc.
- Thomas Joseph Krutsick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Optically triggered electro-static discharge protection circuit
- Patent number 7,715,162
- Issue date May 11, 2010
- Zarlink Semiconductor (US) Inc.
- Thomas Joseph Krutsick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated silicon optical isolator
- Patent number 7,605,010
- Issue date Oct 20, 2009
- Zarlink Semiconductor US, Inc.
- Thomas Joseph Krutsick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Field plated resistor with enhanced routing area thereover
- Patent number 7,439,146
- Issue date Oct 21, 2008
- Agere Systems Inc.
- Thomas J. Krutsick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having an interconnect that electrically conne...
- Patent number 6,828,649
- Issue date Dec 7, 2004
- Agere Systems Inc.
- John C. Desko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Field plated schottky diode and method of fabrication therefor
- Patent number 6,790,753
- Issue date Sep 14, 2004
- Agere Systems Inc.
- John Charles Desko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating complementary self-aligned bipolar transistors
- Patent number 6,767,797
- Issue date Jul 27, 2004
- Agere Systems Inc.
- Thomas J. Krutsick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having a buried layer for reducing latchup and...
- Patent number 6,737,311
- Issue date May 18, 2004
- Agere Systems Inc.
- John Desko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit device substrates with selective epitaxial growt...
- Patent number 6,727,567
- Issue date Apr 27, 2004
- Agere Systems Inc.
- John Joseph Bastek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Field plated Schottky diode
- Patent number 6,690,037
- Issue date Feb 10, 2004
- Agere Systems Inc.
- John Charles Desko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bipolar transistor having an emitter comprised of a semi-insulating...
- Patent number 6,555,852
- Issue date Apr 29, 2003
- Agere Systems Inc.
- Thomas J. Krutsick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing an integrated circuit
- Patent number 6,458,669
- Issue date Oct 1, 2002
- Agere Systems Guardian Corp.
- Thomas J. Krutsick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Manufacture of dielectrically isolated integrated circuits
- Patent number 6,409,829
- Issue date Jun 25, 2002
- Agere Systems Guardian Corp.
- John Joseph Bastek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self aligned gated Schottky diode guard ring structures
- Patent number 6,399,413
- Issue date Jun 4, 2002
- Agere Systems Guardian Corp.
- Thomas J. Krutsick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Schottky diode guard ring structures
- Patent number 6,066,884
- Issue date May 23, 2000
- Lucent Technologies Inc.
- Thomas J. Krutsick
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHODS OF FORMING A SHALLOW BASE REGION OF A BIPOLAR TRANSISTOR
- Publication number 20110143513
- Publication date Jun 16, 2011
- Zarlink Semiconductor (US), Inc.
- Thomas J. Krutsick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LIGHT ACTIVATED SILICON CONTROLLED SWITCH
- Publication number 20110003441
- Publication date Jan 6, 2011
- ZARLINK SEMICONDUCTOR (U.S.) Inc.
- THOMAS J. KRUTSICK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MANUFACTURING A TRENCH CAPACITOR FOR HIGH VOLTAGE PROCESSES
- Publication number 20100006979
- Publication date Jan 14, 2010
- THOMAS J. KRUTSICK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF CONSTRUCTING CMOS DEVICE TUBS
- Publication number 20100009507
- Publication date Jan 14, 2010
- THOMAS J. KRUTSICK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING A SHALLOW BASE REGION OF A BIPOLAR TRANSISTOR
- Publication number 20090250785
- Publication date Oct 8, 2009
- Thomas Joseph Krutsick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF COUNTER-DOPING COLLECTOR REGIONS IN BIPOLAR TRANSISTORS
- Publication number 20090250789
- Publication date Oct 8, 2009
- THOMAS J. KRUTSICK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LIGHT ACTIVATED SILICON CONTROLLED SWITCH
- Publication number 20090250706
- Publication date Oct 8, 2009
- THOMAS J. KRUTSICK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OPTICALLY TRIGGERED ELECTRO-STATIC DISCHARGE PROTECTION CIRCUIT
- Publication number 20090230476
- Publication date Sep 17, 2009
- Thomas Joseph Krutsick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor device including an isolation trench having a dopant...
- Publication number 20040251511
- Publication date Dec 16, 2004
- Agere Systems Inc.
- John C. Desko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Field plated schottky diode and method of fabrication therefor
- Publication number 20040089908
- Publication date May 13, 2004
- John Charles Desko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor device having an interconnect that electrically conne...
- Publication number 20030209776
- Publication date Nov 13, 2003
- Agere Systems Inc.
- John C. Desko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor device including an isolation trench having a dopant...
- Publication number 20030211701
- Publication date Nov 13, 2003
- Agere Systems Inc.
- John C. Desko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of fabricating complementary self-aligned bipolar transistors
- Publication number 20030146477
- Publication date Aug 7, 2003
- Thomas J. Krutsick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of simultaneously manufacturing a metal oxide semiconductor...
- Publication number 20030141566
- Publication date Jul 31, 2003
- Agere Systems Guardian Corp.
- John C. Desko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor device having a buried layer for reducing latchup and...
- Publication number 20030057494
- Publication date Mar 27, 2003
- John Desko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Manufacture of dielectrically isolated integrated circuits
- Publication number 20020092462
- Publication date Jul 18, 2002
- John Joseph Bastek
- H01 - BASIC ELECTRIC ELEMENTS

Thomas J. Krutsick

Person

Patents Grantslast 30 patents

Trench capacitor for high voltage processes and method of manufactu...

Methods of counter-doping collector regions in bipolar transistors

Method of forming a light activated silicon controlled switch

Light activated silicon controlled switch

Optically triggered electro-static discharge protection circuit

Integrated silicon optical isolator

Field plated resistor with enhanced routing area thereover

Semiconductor device having an interconnect that electrically conne...

Field plated schottky diode and method of fabrication therefor

Method of fabricating complementary self-aligned bipolar transistors

Semiconductor device having a buried layer for reducing latchup and...

Integrated circuit device substrates with selective epitaxial growt...

Field plated Schottky diode

Bipolar transistor having an emitter comprised of a semi-insulating...

Method of manufacturing an integrated circuit

Manufacture of dielectrically isolated integrated circuits

Self aligned gated Schottky diode guard ring structures

Schottky diode guard ring structures

Patents Applicationslast 30 patents

METHODS OF FORMING A SHALLOW BASE REGION OF A BIPOLAR TRANSISTOR

LIGHT ACTIVATED SILICON CONTROLLED SWITCH

METHOD OF MANUFACTURING A TRENCH CAPACITOR FOR HIGH VOLTAGE PROCESSES

METHOD OF CONSTRUCTING CMOS DEVICE TUBS

METHODS OF FORMING A SHALLOW BASE REGION OF A BIPOLAR TRANSISTOR

METHODS OF COUNTER-DOPING COLLECTOR REGIONS IN BIPOLAR TRANSISTORS

LIGHT ACTIVATED SILICON CONTROLLED SWITCH

OPTICALLY TRIGGERED ELECTRO-STATIC DISCHARGE PROTECTION CIRCUIT

Semiconductor device including an isolation trench having a dopant...

Field plated schottky diode and method of fabrication therefor

Semiconductor device having an interconnect that electrically conne...

Semiconductor device including an isolation trench having a dopant...

Method of fabricating complementary self-aligned bipolar transistors

Method of simultaneously manufacturing a metal oxide semiconductor...

Semiconductor device having a buried layer for reducing latchup and...

Manufacture of dielectrically isolated integrated circuits