Thomas Mayer

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Linz, AT

People

Patents Grantslast 30 patents

Information Patent Grant
Systems and methods for PLL gain calibration
- Patent number 12,132,490
- Issue date Oct 29, 2024
- Apple Inc.
- Karim M Megawer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Systems and methods for PLL gain calibration and duty cycle calibra...
- Patent number 12,119,830
- Issue date Oct 15, 2024
- Apple Inc.
- Jongmin Park
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Receiver with tunable receiving chain
- Patent number 11,902,899
- Issue date Feb 13, 2024
- Apple Inc.
- Christian Drewes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Apparatus and method for generating an oscillation signal, mobile c...
- Patent number 11,258,451
- Issue date Feb 22, 2022
- Intel Corporation
- Tobias Buckel
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Receiver with tunable receiving chain
- Patent number 11,109,317
- Issue date Aug 31, 2021
- Apple Inc.
- Christian Drewes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Polar modulation systems and methods
- Patent number 10,897,275
- Issue date Jan 19, 2021
- Intel Corporation
- Christoph Preissl
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Synchronizing a digital frequency shift
- Patent number 10,880,136
- Issue date Dec 29, 2020
- Intel IP Corporation
- Christian Mayer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Clock generator, phase locked loop, apparatus, method and computer...
- Patent number 10,804,908
- Issue date Oct 13, 2020
- Intel IP Corporation
- Thomas Mayer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Redundant DCO tuning with overlapping fractional regions
- Patent number 10,771,071
- Issue date Sep 8, 2020
- Apple Inc.
- Thomas Mayer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and a method for determining a correction for an output valu...
- Patent number 10,298,243
- Issue date May 21, 2019
- Intel IP Corporation
- Thomas Mayer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Generation of a transmission signal
- Patent number 10,015,037
- Issue date Jul 3, 2018
- Intel Mobile Communications GmbH
- Zdravko Boos
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital-to-time converter spur reduction
- Patent number 9,768,809
- Issue date Sep 19, 2017
- Intel IP Corporation
- Stefan Tertinek
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuit and method
- Patent number 9,692,443
- Issue date Jun 27, 2017
- INTEL DEUTSCHLAND GMBH
- Bernd-Ulrich Klepser
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Noise-shaping circuit, digital-to-time converter, analog-to-digital...
- Patent number 9,590,647
- Issue date Mar 7, 2017
- Intel IP Corporation
- Peter Preyler
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase tracker for a phase locked loop
- Patent number 9,584,139
- Issue date Feb 28, 2017
- Intel IP Corporation
- Christian Wicpalek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit, an integrated circuit, a transmitter, a receiver, a transc...
- Patent number 9,537,585
- Issue date Jan 3, 2017
- Intel IP Corporation
- Thomas Mayer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Predictive time-to-digital converter and method for providing a dig...
- Patent number 9,479,187
- Issue date Oct 25, 2016
- Intel Corporation
- Thomas Mayer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit, an integrated circuit, a transmitter, a receiver, a transc...
- Patent number 9,438,259
- Issue date Sep 6, 2016
- Intel IP Corporation
- Stefan Tertinek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Oscillator with controllable frequency
- Patent number 9,413,365
- Issue date Aug 9, 2016
- INTEL DEUTSCHLAND GMBH
- Thomas Mayer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Interpolator systems and methods
- Patent number 9,397,689
- Issue date Jul 19, 2016
- Intel Corporation
- Stefan Tertinek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital wideband closed loop phase modulator with modulation gain c...
- Patent number 9,225,562
- Issue date Dec 29, 2015
- INTEL DEUTSCHLAND GMBH
- Thomas Mayer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital wideband closed loop phase modulator with modulation gain c...
- Patent number 9,191,248
- Issue date Nov 17, 2015
- INTEL DEUTSCHLAND GMBH
- Thomas Mayer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Transmitter and receiver
- Patent number 9,118,534
- Issue date Aug 25, 2015
- INTEL DEUTSCHLAND GMBH
- Christian Mayer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuit and method
- Patent number 9,041,576
- Issue date May 26, 2015
- Intel Mobile Communications GmbH
- Bernd-Ulrich Klepser
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuit, method and mobile communication device
- Patent number 9,008,252
- Issue date Apr 14, 2015
- Intel Mobile Communications GmbH
- Thomas Mayer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Non-linear-error correction in fractional-N digital PLL frequency s...
- Patent number 8,791,733
- Issue date Jul 29, 2014
- Intel Mobile Communications GmbH
- Stefan Tertinek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase locked loop, transceiver device and method for generating an...
- Patent number RE44879
- Issue date May 6, 2014
- Intel Mobile Communications GmbH
- Thomas Mayer
- 331 - Oscillators
Information Patent Grant
Bitwidth reduction in loop filters used for digital PLLS
- Patent number 8,598,929
- Issue date Dec 3, 2013
- Intel Mobile Communications GmbH
- Christian Wicpalek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital phase feedback for determining phase distortion
- Patent number 8,532,590
- Issue date Sep 10, 2013
- Intel Mobile Communications GmbH
- Thomas Mayer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Time-to-digital converter with calibration
- Patent number 8,228,219
- Issue date Jul 24, 2012
- Infineon Technologies AG
- Stephan Henzler
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Electronic Devices Having Wireless Transceivers with Reference Cloc...
- Publication number 20240372555
- Publication date Nov 7, 2024
- Apple Inc.
- Thomas Mayer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEMS AND METHODS FOR PLL GAIN CALIBRATION AND DUTY CYCLE CALIBRA...
- Publication number 20240313787
- Publication date Sep 19, 2024
- Apple Inc.
- Jongmin Park
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEMS AND METHODS FOR PLL GAIN CALIBRATION
- Publication number 20240313789
- Publication date Sep 19, 2024
- Apple Inc.
- Karim M Megawer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEMS AND METHODS FOR PLL DUTY CYCLE CALIBRATION
- Publication number 20240313788
- Publication date Sep 19, 2024
- Apple Inc.
- Karim M Megawer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
RECEIVER WITH TUNABLE RECEIVING CHAIN
- Publication number 20210392585
- Publication date Dec 16, 2021
- Apple Inc.
- Christian Drewes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
APPARATUS AND METHOD FOR GENERATING AN OSCILLATION SIGNAL, MOBILE C...
- Publication number 20210218406
- Publication date Jul 15, 2021
- Intel Corporation
- Tobias BUCKEL
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
REDUNDANT DCO TUNING WITH OVERLAPPING FRACTIONAL REGIONS
- Publication number 20200313681
- Publication date Oct 1, 2020
- Intel Corporation
- Thomas Mayer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
RECEIVER WITH TUNABLE RECEIVING CHAIN
- Publication number 20200245248
- Publication date Jul 30, 2020
- Intel IP Corporation
- Christian Drewes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
POLAR MODULATION SYSTEMS AND METHODS
- Publication number 20200212944
- Publication date Jul 2, 2020
- Intel Corporation
- Christoph PREISSL
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYNCHRONIZING A DIGITAL FREQUENCY SHIFT
- Publication number 20200059386
- Publication date Feb 20, 2020
- Intel IP Corporation
- Christian Mayer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CLOCK GENERATOR, PHASE LOCKED LOOP, APPARATUS, METHOD AND COMPUTER...
- Publication number 20190268004
- Publication date Aug 29, 2019
- Intel IP Corporation
- Thomas MAYER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND A METHOD FOR DETERMINING A CORRECTION FOR AN OUTPUT VALU...
- Publication number 20180131380
- Publication date May 10, 2018
- Intel IP Corporation
- Thomas Mayer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CIRCUIT AND METHOD
- Publication number 20160380645
- Publication date Dec 29, 2016
- Intel Deutschland GmbH
- Bernd-Ulrich Klepser
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
NOISE-SHAPING CIRCUIT, DIGITAL-TO-TIME CONVERTER, ANALOG-TO-DIGITAL...
- Publication number 20160182072
- Publication date Jun 23, 2016
- Intel IP Corporation
- Peter Preyler
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PREDICTIVE TIME-TO-DIGITAL CONVERTER AND METHOD FOR PROVIDING A DIG...
- Publication number 20160173118
- Publication date Jun 16, 2016
- Intel Corporation
- Thomas Mayer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Interpolator Systems and Methods
- Publication number 20160149584
- Publication date May 26, 2016
- Intel Corporation
- Stefan Tertinek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CIRCUIT, AN INTEGRATED CIRCUIT, A TRANSMITTER, A RECEIVER, A TRANSC...
- Publication number 20160094237
- Publication date Mar 31, 2016
- Intel IP Corporation
- Stefan Tertinek
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PHASE TRACKER FOR A PHASE LOCKED LOOP
- Publication number 20160087639
- Publication date Mar 24, 2016
- Intel IP Corporation
- Christian Wicpalek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DIGITAL-TO-TIME CONVERTER SPUR REDUCTION
- Publication number 20150381214
- Publication date Dec 31, 2015
- Stefan Tertinek
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CIRCUIT, AN INTEGRATED CIRCUIT, A TRANSMITTER, A RECEIVER, A TRANSC...
- Publication number 20150280842
- Publication date Oct 1, 2015
- Intel IP Corporation
- Thomas Mayer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Transmitter and Receiver
- Publication number 20140269855
- Publication date Sep 18, 2014
- Christian Mayer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CIRCUIT, METHOD AND MOBILE COMMUNICATION DEVICE
- Publication number 20140105343
- Publication date Apr 17, 2014
- Thomas Mayer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Non-Linear-Error Correction in Fractional-N Digital PLL Frequency S...
- Publication number 20140097875
- Publication date Apr 10, 2014
- Stefan Tertinek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Circuit and Method
- Publication number 20140002287
- Publication date Jan 2, 2014
- Bernd-Ulrich Klepser
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DIGITAL WIDEBAND CLOSED LOOP PHASE MODULATOR WITH MODULATION GAIN C...
- Publication number 20130223564
- Publication date Aug 29, 2013
- Intel Mobile Communications GmbH
- Thomas Mayer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
COMPENSATION OF PHASE LOCK LOOP (PLL) PHASE DISTRIBUTION CAUSED BY...
- Publication number 20120092048
- Publication date Apr 19, 2012
- Thomas MAYER
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Digital Phase Feedback for Determining Phase Distortion
- Publication number 20120008715
- Publication date Jan 12, 2012
- INFINEON TECHNOLOGIES AG
- Thomas Mayer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TIME-TO-DIGITAL CONVERTER WITH CALIBRATION
- Publication number 20110304361
- Publication date Dec 15, 2011
- Stephan HENZLER
- G04 - HOROLOGY
Information Patent Application
OSCILLATOR WITH CONTROLLABLE FREQUENCY
- Publication number 20110221539
- Publication date Sep 15, 2011
- Thomas MAYER
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Estimation and Compensation of Oscillator Nonlinearities
- Publication number 20110084769
- Publication date Apr 14, 2011
- Christian Wicpalek
- H03 - BASIC ELECTRONIC CIRCUITRY

Thomas Mayer

Person

Patents Grantslast 30 patents

Systems and methods for PLL gain calibration

Systems and methods for PLL gain calibration and duty cycle calibra...

Receiver with tunable receiving chain

Apparatus and method for generating an oscillation signal, mobile c...

Receiver with tunable receiving chain

Polar modulation systems and methods

Synchronizing a digital frequency shift

Clock generator, phase locked loop, apparatus, method and computer...

Redundant DCO tuning with overlapping fractional regions

System and a method for determining a correction for an output valu...

Generation of a transmission signal

Digital-to-time converter spur reduction

Circuit and method

Noise-shaping circuit, digital-to-time converter, analog-to-digital...

Phase tracker for a phase locked loop

Circuit, an integrated circuit, a transmitter, a receiver, a transc...

Predictive time-to-digital converter and method for providing a dig...

Circuit, an integrated circuit, a transmitter, a receiver, a transc...

Oscillator with controllable frequency

Interpolator systems and methods

Digital wideband closed loop phase modulator with modulation gain c...

Digital wideband closed loop phase modulator with modulation gain c...

Transmitter and receiver

Circuit and method

Circuit, method and mobile communication device

Non-linear-error correction in fractional-N digital PLL frequency s...

Phase locked loop, transceiver device and method for generating an...

Bitwidth reduction in loop filters used for digital PLLS

Digital phase feedback for determining phase distortion

Time-to-digital converter with calibration

Patents Applicationslast 30 patents

Electronic Devices Having Wireless Transceivers with Reference Cloc...

SYSTEMS AND METHODS FOR PLL GAIN CALIBRATION AND DUTY CYCLE CALIBRA...

SYSTEMS AND METHODS FOR PLL GAIN CALIBRATION

SYSTEMS AND METHODS FOR PLL DUTY CYCLE CALIBRATION

RECEIVER WITH TUNABLE RECEIVING CHAIN

APPARATUS AND METHOD FOR GENERATING AN OSCILLATION SIGNAL, MOBILE C...

REDUNDANT DCO TUNING WITH OVERLAPPING FRACTIONAL REGIONS

RECEIVER WITH TUNABLE RECEIVING CHAIN

POLAR MODULATION SYSTEMS AND METHODS

SYNCHRONIZING A DIGITAL FREQUENCY SHIFT

CLOCK GENERATOR, PHASE LOCKED LOOP, APPARATUS, METHOD AND COMPUTER...

SYSTEM AND A METHOD FOR DETERMINING A CORRECTION FOR AN OUTPUT VALU...

CIRCUIT AND METHOD

NOISE-SHAPING CIRCUIT, DIGITAL-TO-TIME CONVERTER, ANALOG-TO-DIGITAL...

PREDICTIVE TIME-TO-DIGITAL CONVERTER AND METHOD FOR PROVIDING A DIG...

Interpolator Systems and Methods

CIRCUIT, AN INTEGRATED CIRCUIT, A TRANSMITTER, A RECEIVER, A TRANSC...

PHASE TRACKER FOR A PHASE LOCKED LOOP

DIGITAL-TO-TIME CONVERTER SPUR REDUCTION

CIRCUIT, AN INTEGRATED CIRCUIT, A TRANSMITTER, A RECEIVER, A TRANSC...

Transmitter and Receiver

CIRCUIT, METHOD AND MOBILE COMMUNICATION DEVICE

Non-Linear-Error Correction in Fractional-N Digital PLL Frequency S...

Circuit and Method

DIGITAL WIDEBAND CLOSED LOOP PHASE MODULATOR WITH MODULATION GAIN C...

COMPENSATION OF PHASE LOCK LOOP (PLL) PHASE DISTRIBUTION CAUSED BY...

Digital Phase Feedback for Determining Phase Distortion

TIME-TO-DIGITAL CONVERTER WITH CALIBRATION

OSCILLATOR WITH CONTROLLABLE FREQUENCY

Estimation and Compensation of Oscillator Nonlinearities