Thomas Rohr

Person

Aschheim, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Microelectronic device with a plurality of storage elements in seri...
- Patent number 7,423,281
- Issue date Sep 9, 2008
- Infineon Technologies AG
- Thomas Röhr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device having an array of resistive memory cells
- Patent number 7,254,073
- Issue date Aug 7, 2007
- Infineon Technologies AG
- Thomas Röhr
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory arrangement based on resistive memory cells and p...
- Patent number 7,233,515
- Issue date Jun 19, 2007
- Infineon Technologies AG
- Thomas Rohr
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor component having a material reinforced contact area
- Patent number 6,906,370
- Issue date Jun 14, 2005
- Infineon Technologies AG
- Holger Hübner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Random access semiconductor memory with reduced signal overcoupling
- Patent number 6,826,075
- Issue date Nov 30, 2004
- Infineon Technologies AG
- Dietmar Gogl
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory and corresponding operating method
- Patent number 6,538,950
- Issue date Mar 25, 2003
- Infineon Technologies AG
- Thomas Böhm
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated semiconductor memory having memory cells with a ferroele...
- Patent number 6,515,890
- Issue date Feb 4, 2003
- Infineon Technologies AG
- Robert Esterl
- G11 - INFORMATION STORAGE
Information Patent Grant
Current driver configuration for MRAM
- Patent number 6,483,768
- Issue date Nov 19, 2002
- Infineon Technologies AG
- Thomas Böhm
- G11 - INFORMATION STORAGE
Information Patent Grant
Decoder element for generating an output signal having three differ...
- Patent number 6,480,055
- Issue date Nov 12, 2002
- Infineon Technologies AG
- Thomas Böhm
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of fabricating semiconductor components
- Patent number 6,468,896
- Issue date Oct 22, 2002
- Infineon Technologies AG
- Thomas Röhr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor memory configuration with a refresh logic circuit, an...
- Patent number 6,452,852
- Issue date Sep 17, 2002
- Infineon Technologies AG
- Thomas Böhm
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory
- Patent number 6,442,100
- Issue date Aug 27, 2002
- Infineon Technologies AG
- Thomas Böhm
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit configuration for generating a reference voltage for readin...
- Patent number 6,392,918
- Issue date May 21, 2002
- Infineon Technologies AG
- Georg Braun
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory having a differential sense amplifier
- Patent number 6,351,422
- Issue date Feb 26, 2002
- Infineon Technologies AG
- Thomas Röhr
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory having sense amplifiers disposed on opposite side...
- Patent number 6,259,641
- Issue date Jul 10, 2001
- Infineon Technologies AG
- Zoltan Manyoki
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit having a decoder
- Patent number 6,255,855
- Issue date Jul 3, 2001
- Infineon Technologies AG
- Heinz Hönigschmid
- G11 - INFORMATION STORAGE
Information Patent Grant
Ferroelectric memory configuration
- Patent number 6,137,712
- Issue date Oct 24, 2000
- Infineon Technologies AG
- Thomas Rohr
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Memory circuit as well as method for evaluating a memory datum of a...
- Publication number 20070091667
- Publication date Apr 26, 2007
- Qimonda AG
- Thomas Rohr
- G11 - INFORMATION STORAGE
Information Patent Application
Memory device comprising an array of resistive memory cells
- Publication number 20070070681
- Publication date Mar 29, 2007
- Infineon Technologies AG
- Thomas Rohr
- G11 - INFORMATION STORAGE
Information Patent Application
Microelectronic device with storage elements and method of producin...
- Publication number 20070069273
- Publication date Mar 29, 2007
- Infineon Technologies AG
- Thomas Rohr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integration of 1T1R CBRAM memory cells
- Publication number 20060139989
- Publication date Jun 29, 2006
- Infineon Technologies AG
- Ulrike Gruning Von Schwerin
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated memory arrangement based on resistive memory cells and p...
- Publication number 20060050545
- Publication date Mar 9, 2006
- Thomas Rohr
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated memory and corresponding operating method
- Publication number 20020044493
- Publication date Apr 18, 2002
- Thomas Bohm
- G11 - INFORMATION STORAGE
Information Patent Application
Current driver configuration for MRAM
- Publication number 20020024875
- Publication date Feb 28, 2002
- Thomas Bohm
- G11 - INFORMATION STORAGE
Information Patent Application
Random access semiconductor memory with reduced signal overcoupling
- Publication number 20020012266
- Publication date Jan 31, 2002
- Dietmar Gogl
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Decoder element for generating an output signal having three differ...
- Publication number 20020008564
- Publication date Jan 24, 2002
- Thomas Bohm
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated memory
- Publication number 20020003735
- Publication date Jan 10, 2002
- Thomas Bohm
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated semiconductor memory having memory cells with a ferroele...
- Publication number 20010038561
- Publication date Nov 8, 2001
- Robert Esterl
- G11 - INFORMATION STORAGE
Information Patent Application
Circuit configuration for generating a reference voltage for readin...
- Publication number 20010038557
- Publication date Nov 8, 2001
- Georg Braun
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated memory having a differential sense amplifier
- Publication number 20010038562
- Publication date Nov 8, 2001
- Thomas Rohr
- G11 - INFORMATION STORAGE
Information Patent Application
Decoder element for producing an output signal having three differe...
- Publication number 20010026485
- Publication date Oct 4, 2001
- Thomas Rohr
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Semiconductor memory configuration with a refresh logic circuit, an...
- Publication number 20010026491
- Publication date Oct 4, 2001
- Thomas Bohm
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated memory having a bit line reference voltage, and a method...
- Publication number 20010024396
- Publication date Sep 27, 2001
- Thomas Bohm
- G11 - INFORMATION STORAGE
Information Patent Application
Method for fabricating semiconductor components
- Publication number 20010024873
- Publication date Sep 27, 2001
- Thomas Rohr
- H01 - BASIC ELECTRIC ELEMENTS

Thomas Rohr

Person

Patents Grantslast 30 patents

Microelectronic device with a plurality of storage elements in seri...

Memory device having an array of resistive memory cells

Integrated memory arrangement based on resistive memory cells and p...

Semiconductor component having a material reinforced contact area

Random access semiconductor memory with reduced signal overcoupling

Integrated memory and corresponding operating method

Integrated semiconductor memory having memory cells with a ferroele...

Current driver configuration for MRAM

Decoder element for generating an output signal having three differ...

Method of fabricating semiconductor components

Semiconductor memory configuration with a refresh logic circuit, an...

Integrated memory

Circuit configuration for generating a reference voltage for readin...

Integrated memory having a differential sense amplifier

Integrated memory having sense amplifiers disposed on opposite side...

Integrated circuit having a decoder

Ferroelectric memory configuration

Patents Applicationslast 30 patents

Memory circuit as well as method for evaluating a memory datum of a...

Memory device comprising an array of resistive memory cells

Microelectronic device with storage elements and method of producin...

Integration of 1T1R CBRAM memory cells

Integrated memory arrangement based on resistive memory cells and p...

Integrated memory and corresponding operating method

Current driver configuration for MRAM

Random access semiconductor memory with reduced signal overcoupling

Decoder element for generating an output signal having three differ...

Integrated memory

Integrated semiconductor memory having memory cells with a ferroele...

Circuit configuration for generating a reference voltage for readin...

Integrated memory having a differential sense amplifier

Decoder element for producing an output signal having three differe...

Semiconductor memory configuration with a refresh logic circuit, an...

Integrated memory having a bit line reference voltage, and a method...

Method for fabricating semiconductor components