Thomas Wagner

Person

Regelsbach, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Assembly of 2XD module using high density interconnect bridges
- Patent number 12,125,815
- Issue date Oct 22, 2024
- Intel Corporation
- Bernd Waidhas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package formation methods including coupling a molded routing layer...
- Patent number 12,057,364
- Issue date Aug 6, 2024
- Intel Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
WLCSP reliability improvement for package edges including package s...
- Patent number 11,990,408
- Issue date May 21, 2024
- Intel Corporation
- Thomas Wagner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fan out package with integrated peripheral devices and methods
- Patent number 11,955,395
- Issue date Apr 9, 2024
- Intel Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor packages, and methods for forming semiconductor packages
- Patent number 11,764,187
- Issue date Sep 19, 2023
- Intel Corporation
- Bernd Waidhas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrating and accessing passive components in wafer-level packages
- Patent number 11,646,288
- Issue date May 9, 2023
- Intel Corporation
- Gianni Signorini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip scale thin 3D die stacked package
- Patent number 11,581,287
- Issue date Feb 14, 2023
- Intel Corporation
- Robert Sankman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fan out package and methods
- Patent number 11,508,637
- Issue date Nov 22, 2022
- Intel Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Systems, methods, and apparatuses for implementing reduced height s...
- Patent number 11,469,213
- Issue date Oct 11, 2022
- Intel Corporation
- Georg Seidemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fan out package with integrated peripheral devices and methods
- Patent number 11,404,339
- Issue date Aug 2, 2022
- Intel Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Patch antennas stitched to systems in packages and methods of assem...
- Patent number 11,374,323
- Issue date Jun 28, 2022
- Intel Corporation
- Andreas Augustin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bare-die smart bridge connected with copper pillars for system-in-p...
- Patent number 11,270,941
- Issue date Mar 8, 2022
- Intel Corporation
- Georg Seidemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Face-up fan-out electronic package with passive components using a...
- Patent number 11,211,337
- Issue date Dec 28, 2021
- Intel Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical and lateral interconnects between dies
- Patent number 11,177,220
- Issue date Nov 16, 2021
- Intel Corporation
- Georg Seidemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor inductors
- Patent number 11,127,813
- Issue date Sep 21, 2021
- Intel Corporation
- Georg Seidemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect structure for stacked die in a microelectronic device
- Patent number 11,107,763
- Issue date Aug 31, 2021
- Intel Corporation
- Thomas Wagner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Monolithic silicon bridge stack including a hybrid baseband die sup...
- Patent number 11,018,114
- Issue date May 25, 2021
- Intel IP Corporation
- Bernd Waidhas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit packages including an optical redistribution layer
- Patent number 10,816,742
- Issue date Oct 27, 2020
- Intel IP Corporation
- Georg Seidemann
- G02 - OPTICS
Information Patent Grant
Multi-layer redistribution layer for wafer-level packaging
- Patent number 10,756,042
- Issue date Aug 25, 2020
- Intel IP Corporation
- Thomas Wagner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded-bridge substrate connectors and methods of assembling same
- Patent number 10,727,197
- Issue date Jul 28, 2020
- Intel IP Corporation
- Bernd Waidhas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Molded substrate package in fan-out wafer level package
- Patent number 10,720,393
- Issue date Jul 21, 2020
- Intel IP Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fan out package with integrated peripheral devices and methods
- Patent number 10,699,980
- Issue date Jun 30, 2020
- Intel IP Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package including an integrated routing layer and a molded routing...
- Patent number 10,665,522
- Issue date May 26, 2020
- Intel IP Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package having a variable redistribution layer thickness
- Patent number 10,553,538
- Issue date Feb 4, 2020
- Intel Corporation
- Klaus Jürgen Reingruber
- C25 - ELECTROLYTIC OR ELECTROPHORETIC PROCESSES APPARATUS THEREFOR
Information Patent Grant
Face-up fan-out electronic package with passive components using a...
- Patent number 10,546,817
- Issue date Jan 28, 2020
- Intel IP Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrical device and a method for forming an electrical device
- Patent number 10,522,485
- Issue date Dec 31, 2019
- Intel IP Corporation
- Christian Geissler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical wire connections for integrated circuit package
- Patent number 10,490,527
- Issue date Nov 26, 2019
- Intel IP Corporation
- Christian Geissler
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Cross-connected multi-chip modules coupled by silicon bent-bridge i...
- Patent number 10,431,545
- Issue date Oct 1, 2019
- Intel IP Corporation
- Georg Seidemann
- G11 - INFORMATION STORAGE
Information Patent Grant
Microelectronic package with illuminated backside exterior
- Patent number 10,411,000
- Issue date Sep 10, 2019
- Intel IP Corporation
- Marc Stephan Dittes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System-in-package devices and methods for forming system-in-package...
- Patent number 10,403,609
- Issue date Sep 3, 2019
- Intel IP Corporation
- Christian Geissler
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Routing and Passive Components in a Direct Bonding Layer
- Publication number 20250006630
- Publication date Jan 2, 2025
- Intel Corporation
- Carla Moran Guizan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GLASS LAYERS AND CAPACITORS FOR USE WITH INTEGRATED CIRCUIT PACKAGES
- Publication number 20240429221
- Publication date Dec 26, 2024
- Intel Corporation
- Bernd Waidhas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIELECTRIC MATERIAL AND A MOLD COMPOUND WITH DIFFERENT DIELECTRIC C...
- Publication number 20240429117
- Publication date Dec 26, 2024
- Intel Corporation
- Harshit DHAKAD
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ANTENNA MODULES AND COMMUNICATION DEVICES
- Publication number 20240405433
- Publication date Dec 5, 2024
- Intel Corporation
- Telesphor Kamgaing
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HEAT DISSIPATION SOLUTIONS FOR INTEGRATED CIRCUIT PACKAGES
- Publication number 20240395655
- Publication date Nov 28, 2024
- Intel Corporation
- Avi Tsarfati
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MILLIMETER WAVE ANTENNA ESD PROTECTION USING INTEGRATED POLYMER NAN...
- Publication number 20240364002
- Publication date Oct 31, 2024
- Intel Corporation
- Harald Gossner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SPHERICAL ANTENNA ARRANGEMENT WITH Z-DIMENSIONAL PLATED ANTENNA STR...
- Publication number 20240364023
- Publication date Oct 31, 2024
- Intel Corporation
- Thomas Wagner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ANTENNA MODULE WITH CAPACITIVE COUPLING
- Publication number 20240364000
- Publication date Oct 31, 2024
- Intel Corporation
- Bernd WAIDHAS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RF ANTENNA MODULE USING COPPER-TO-COPPER INTERCONNECTS BETWEEN THE...
- Publication number 20240363567
- Publication date Oct 31, 2024
- Intel Corporation
- Bernd WAIDHAS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED MILLIMETER WAVE ANTENNA ESD PROTECTION
- Publication number 20240363556
- Publication date Oct 31, 2024
- Intel Corporation
- Harald Gossner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE FORMATION METHODS INCLUDING COUPLING A MOLDED ROUTING LAYER...
- Publication number 20240355697
- Publication date Oct 24, 2024
- Intel Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FAN OUT PACKAGE WITH INTEGRATED PERIPHERAL DEVICES AND METHODS
- Publication number 20240194552
- Publication date Jun 13, 2024
- Intel Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ASSEMBLY OF 2XD MODULE USING HIGH DENSITY INTERCONNECT BRIDGES
- Publication number 20240128223
- Publication date Apr 18, 2024
- Intel Corporation
- Bernd Waidhas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATING AND ACCESSING PASSIVE COMPONENTS IN WAFER-LEVEL PACKAGES
- Publication number 20240030175
- Publication date Jan 25, 2024
- Intel Corporation
- Gianni SIGNORINI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP-FIRST LAYERED PACKAGING ARCHITECTURE
- Publication number 20230411348
- Publication date Dec 21, 2023
- Intel Corporation
- Carlton Hanna
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HETEROGENEOUS PACKAGES HAVING THERMAL TOWERS
- Publication number 20230317551
- Publication date Oct 5, 2023
- Intel Corporation
- Vishnu Prasad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGES HAVING REDUCED Z-HEIGHT AND HEAT PATH
- Publication number 20230317544
- Publication date Oct 5, 2023
- Intel Corporation
- Jan Proschwitz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL STACK COOLING WINGS
- Publication number 20230317681
- Publication date Oct 5, 2023
- Intel Corporation
- Sonja Koller
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GROOVED PACKAGE
- Publication number 20230317536
- Publication date Oct 5, 2023
- Intel Corporation
- Georg SEIDEMANN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC ASSEMBLIES INCLUDING STIFFENERS AROUND INDIVIDUAL DIES
- Publication number 20230298953
- Publication date Sep 21, 2023
- Intel Corporation
- Pouya Talebbeydokhti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGES HAVING REDUCED Z-HEIGHT
- Publication number 20230300975
- Publication date Sep 21, 2023
- Intel Corporation
- Jan Proschwitz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED DIE PACKAGING ARCHITECTURE WITH CONDUCTIVE VIAS ON INTERPOSER
- Publication number 20230282615
- Publication date Sep 7, 2023
- Intel Corporation
- Thomas Wagner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGING ARCHITECTURE WITH REINFORCEMENT STRUCTURE IN PACKAGE SUBS...
- Publication number 20230268286
- Publication date Aug 24, 2023
- Intel Corporation
- Mohan Prashanth Javare Gowda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGING ARCHITECTURE WITH REINFORCEMENT STRUCTURE IN PACKAGE SUBS...
- Publication number 20230268291
- Publication date Aug 24, 2023
- Intel Corporation
- Mohan Prashanth Javare Gowda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATING AND ACCESSING PASSIVE COMPONENTS IN WAFER-LEVEL PACKAGES
- Publication number 20230238347
- Publication date Jul 27, 2023
- Intel IP Corporation
- Gianni SIGNORINI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BURIED POWER RAILS INTEGRATED WITH DECOUPLING CAPACITANCE
- Publication number 20230197599
- Publication date Jun 22, 2023
- Intel Corporation
- Bernd Waidhas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Structure and Method for Forming a Semiconductor Stru...
- Publication number 20230197537
- Publication date Jun 22, 2023
- Intel Corporation
- Richard GEIGER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Die, Heat Spreader, Semiconductor Package, Semiconduc...
- Publication number 20230197566
- Publication date Jun 22, 2023
- Intel Corporation
- Bernd WAIDHAS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSFORMERS BASED ON BURIED POWER RAIL TECHNOLOGY
- Publication number 20230197615
- Publication date Jun 22, 2023
- Intel Corporation
- Peter BAUMGARTNER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SIGNAL ROUTING USING STRUCTURES BASED ON BURIED POWER RAILS
- Publication number 20230187353
- Publication date Jun 15, 2023
- Intel Corporation
- Martin OSTERMAYR
- H01 - BASIC ELECTRIC ELEMENTS

Thomas Wagner

Person

Patents Grantslast 30 patents

Assembly of 2XD module using high density interconnect bridges

Package formation methods including coupling a molded routing layer...

WLCSP reliability improvement for package edges including package s...

Fan out package with integrated peripheral devices and methods

Semiconductor packages, and methods for forming semiconductor packages

Integrating and accessing passive components in wafer-level packages

Chip scale thin 3D die stacked package

Fan out package and methods

Systems, methods, and apparatuses for implementing reduced height s...

Fan out package with integrated peripheral devices and methods

Patch antennas stitched to systems in packages and methods of assem...

Bare-die smart bridge connected with copper pillars for system-in-p...

Face-up fan-out electronic package with passive components using a...

Vertical and lateral interconnects between dies

Semiconductor inductors

Interconnect structure for stacked die in a microelectronic device

Monolithic silicon bridge stack including a hybrid baseband die sup...

Integrated circuit packages including an optical redistribution layer

Multi-layer redistribution layer for wafer-level packaging

Embedded-bridge substrate connectors and methods of assembling same

Molded substrate package in fan-out wafer level package

Fan out package with integrated peripheral devices and methods

Package including an integrated routing layer and a molded routing...

Semiconductor package having a variable redistribution layer thickness

Face-up fan-out electronic package with passive components using a...

Electrical device and a method for forming an electrical device

Vertical wire connections for integrated circuit package

Cross-connected multi-chip modules coupled by silicon bent-bridge i...

Microelectronic package with illuminated backside exterior

System-in-package devices and methods for forming system-in-package...

Patents Applicationslast 30 patents

Routing and Passive Components in a Direct Bonding Layer

GLASS LAYERS AND CAPACITORS FOR USE WITH INTEGRATED CIRCUIT PACKAGES

DIELECTRIC MATERIAL AND A MOLD COMPOUND WITH DIFFERENT DIELECTRIC C...

ANTENNA MODULES AND COMMUNICATION DEVICES

HEAT DISSIPATION SOLUTIONS FOR INTEGRATED CIRCUIT PACKAGES

MILLIMETER WAVE ANTENNA ESD PROTECTION USING INTEGRATED POLYMER NAN...

SPHERICAL ANTENNA ARRANGEMENT WITH Z-DIMENSIONAL PLATED ANTENNA STR...

ANTENNA MODULE WITH CAPACITIVE COUPLING

RF ANTENNA MODULE USING COPPER-TO-COPPER INTERCONNECTS BETWEEN THE...

INTEGRATED MILLIMETER WAVE ANTENNA ESD PROTECTION

PACKAGE FORMATION METHODS INCLUDING COUPLING A MOLDED ROUTING LAYER...

FAN OUT PACKAGE WITH INTEGRATED PERIPHERAL DEVICES AND METHODS

ASSEMBLY OF 2XD MODULE USING HIGH DENSITY INTERCONNECT BRIDGES

INTEGRATING AND ACCESSING PASSIVE COMPONENTS IN WAFER-LEVEL PACKAGES

CHIP-FIRST LAYERED PACKAGING ARCHITECTURE

HETEROGENEOUS PACKAGES HAVING THERMAL TOWERS

INTEGRATED CIRCUIT PACKAGES HAVING REDUCED Z-HEIGHT AND HEAT PATH

THREE-DIMENSIONAL STACK COOLING WINGS

GROOVED PACKAGE

MICROELECTRONIC ASSEMBLIES INCLUDING STIFFENERS AROUND INDIVIDUAL DIES

INTEGRATED CIRCUIT PACKAGES HAVING REDUCED Z-HEIGHT

STACKED DIE PACKAGING ARCHITECTURE WITH CONDUCTIVE VIAS ON INTERPOSER

PACKAGING ARCHITECTURE WITH REINFORCEMENT STRUCTURE IN PACKAGE SUBS...

PACKAGING ARCHITECTURE WITH REINFORCEMENT STRUCTURE IN PACKAGE SUBS...

INTEGRATING AND ACCESSING PASSIVE COMPONENTS IN WAFER-LEVEL PACKAGES

BURIED POWER RAILS INTEGRATED WITH DECOUPLING CAPACITANCE

Semiconductor Structure and Method for Forming a Semiconductor Stru...

Semiconductor Die, Heat Spreader, Semiconductor Package, Semiconduc...

TRANSFORMERS BASED ON BURIED POWER RAIL TECHNOLOGY

SIGNAL ROUTING USING STRUCTURES BASED ON BURIED POWER RAILS