Tieyu ZHENG

Person

Redmond, WA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Test, validation, and debug architecture
- Patent number 10,198,333
- Issue date Feb 5, 2019
- Intel Corporation
- Mark B. Trobough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit package with spatially varied solder resist open...
- Patent number 9,312,237
- Issue date Apr 12, 2016
- Intel Corporation
- Tieyu Zheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package with spatially varied solder resist open...
- Patent number 8,952,532
- Issue date Feb 10, 2015
- Intel Corporation
- Tieyu Zheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making a self-balanced dual L-shaped socket
- Patent number 8,074,354
- Issue date Dec 13, 2011
- Intel Corporation
- Tieyu Zheng
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Land grid array (LGA) socket with cells and method of fabrication a...
- Patent number 7,695,288
- Issue date Apr 13, 2010
- Intel Corporation
- Xiaoqing Ma
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Extended package substrate
- Patent number 7,677,902
- Issue date Mar 16, 2010
- Intel Corporation
- James A. Irvine
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lateral force countering load mechanism for LGA sockets
- Patent number 7,604,486
- Issue date Oct 20, 2009
- Intel Corporation
- Robert R. Martinson
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Pick-and-place cap for socket assembly
- Patent number 7,524,199
- Issue date Apr 28, 2009
- Intel Corporation
- Tieyu Zheng
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Socket for land grid array package
- Patent number 7,497,696
- Issue date Mar 3, 2009
- Intel Corporation
- Robert Martinson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Socket assembly that includes improved contact arrangement
- Patent number 7,479,015
- Issue date Jan 20, 2009
- Intel Corporation
- Thomas G. Ruttan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Socket assembly for securing socket body
- Patent number 7,429,182
- Issue date Sep 30, 2008
- Intel Corporation
- Tieyu Zheng
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Self-balanced dual L-shaped socket
- Patent number 7,419,383
- Issue date Sep 2, 2008
- Intel Corporation
- Tieyu Zheng
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Extended package substrate
- Patent number 7,278,859
- Issue date Oct 9, 2007
- Intel Corporation
- James A. Irvine
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-balanced land grid array socket
- Patent number 7,261,572
- Issue date Aug 28, 2007
- Intel Corporation
- Tieyu Zheng
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Low-profile package for housing an optoelectronic assembly
- Patent number 7,255,494
- Issue date Aug 14, 2007
- Intel Corporation
- Tieyu Zheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package for housing an optoelectronic assembly
- Patent number 7,255,496
- Issue date Aug 14, 2007
- Intel Corporation
- Raghuram Narayan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked land grid array package
- Patent number 7,227,248
- Issue date Jun 5, 2007
- Intel Corporation
- Tieyu Zheng
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method and apparatus for manufacturing a transistor-outline (TO) ca...
- Patent number 7,223,629
- Issue date May 29, 2007
- Intel Corporation
- Tieyu Zheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for manufacturing a transistor-outline (TO) ca...
- Patent number 7,201,521
- Issue date Apr 10, 2007
- Intel Corporation
- Tieyu Zheng
- G02 - OPTICS
Information Patent Grant
Method and apparatus for manufacturing a transistor-outline (TO) ca...
- Patent number 7,176,436
- Issue date Feb 13, 2007
- Intel Corporation
- Tieyu Zheng
- G02 - OPTICS
Information Patent Grant
Stacked land grid array package
- Patent number 6,992,373
- Issue date Jan 31, 2006
- Intel Corporation
- Tieyu Zheng
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Package for housing an optoelectronic assembly
- Patent number 6,860,652
- Issue date Mar 1, 2005
- Intel Corporation
- Raghuram Narayan
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
TEST, VALIDATION, AND DEBUG ARCHITECTURE
- Publication number 20150127983
- Publication date May 7, 2015
- Intel Corporation
- Mark B. Trobough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT PACKAGE WITH SPATIALLY VARIED SOLDER RESIST OPEN...
- Publication number 20150108204
- Publication date Apr 23, 2015
- Intel Corporation
- Tieyu Zheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE WITH SPATIALLY VARIED SOLDER RESIST OPEN...
- Publication number 20140332956
- Publication date Nov 13, 2014
- Tieyu ZHENG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GAPPED ATTACHMENT STRUCTURES
- Publication number 20140168909
- Publication date Jun 19, 2014
- Tieyu Zheng
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Land grid array (LGA) socket with cells and method of fabrication a...
- Publication number 20090325398
- Publication date Dec 31, 2009
- Xiaoqing Ma
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
PICK-AND-PLACE CAP FOR SOCKET ASSEMBLY
- Publication number 20090088015
- Publication date Apr 2, 2009
- Intel Corporation
- Tieyu Zheng
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
SELF-BALANCED DUAL L-SHAPED SOCKET
- Publication number 20080268670
- Publication date Oct 30, 2008
- Intel Corporation
- Tieyu Zheng
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Socket for land grid array package
- Publication number 20080242123
- Publication date Oct 2, 2008
- Robert Martinson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LATERAL FORCE COUNTERING LOAD MECHANISM FOR LGA SOCKETS
- Publication number 20080151511
- Publication date Jun 26, 2008
- Robert R. Martinson
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
EXTENDED PACKAGE SUBSTRATE
- Publication number 20080055825
- Publication date Mar 6, 2008
- James A. Irvine
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOCKET ASSEMBLY THAT INCLUDES IMPROVED CONTACT ARRANGEMENT
- Publication number 20080003843
- Publication date Jan 3, 2008
- Thomas G. Ruttan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Self-balanced dual L-shaped socket
- Publication number 20070082513
- Publication date Apr 12, 2007
- Tieyu Zheng
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Self-balanced land grid array socket
- Publication number 20060094265
- Publication date May 4, 2006
- Tieyu Zheng
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Stacked land grid array package
- Publication number 20060060950
- Publication date Mar 23, 2006
- Tieyu Zheng
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Stacked land grid array package
- Publication number 20050253246
- Publication date Nov 17, 2005
- Tieyu Zheng
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Optoelectronic module with integrated cooler
- Publication number 20050207458
- Publication date Sep 22, 2005
- Tieyu Zheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Package for housing an optoelectronic assembly
- Publication number 20050141828
- Publication date Jun 30, 2005
- Intel Corporation
- Raghuram Narayan
- G02 - OPTICS
Information Patent Application
Method and apparatus for manufacturing a transistor-outline (TO) ca...
- Publication number 20050129372
- Publication date Jun 16, 2005
- Tieyu Zheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for manufacturing a transistor-outline (TO) ca...
- Publication number 20050127281
- Publication date Jun 16, 2005
- Tieyu Zheng
- G02 - OPTICS
Information Patent Application
Method and apparatus for manufacturing a transistor -outline (TO) c...
- Publication number 20050130342
- Publication date Jun 16, 2005
- Tieyu Zheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and apparatus for manufacturing a transistor-outline (TO) ca...
- Publication number 20050129373
- Publication date Jun 16, 2005
- Tieyu Zheng
- G02 - OPTICS
Information Patent Application
Low-profile package for housing an optoelectronic assembly
- Publication number 20040234214
- Publication date Nov 25, 2004
- Tieyu Zheng
- G02 - OPTICS
Information Patent Application
Package for housing an optoelectronic assembly
- Publication number 20040234213
- Publication date Nov 25, 2004
- Raghuram Narayan
- G02 - OPTICS

Tieyu ZHENG

Person

Patents Grantslast 30 patents

Test, validation, and debug architecture

Integrated circuit package with spatially varied solder resist open...

Integrated circuit package with spatially varied solder resist open...

Method of making a self-balanced dual L-shaped socket

Land grid array (LGA) socket with cells and method of fabrication a...

Extended package substrate

Lateral force countering load mechanism for LGA sockets

Pick-and-place cap for socket assembly

Socket for land grid array package

Socket assembly that includes improved contact arrangement

Socket assembly for securing socket body

Self-balanced dual L-shaped socket

Extended package substrate

Self-balanced land grid array socket

Low-profile package for housing an optoelectronic assembly

Package for housing an optoelectronic assembly

Stacked land grid array package

Method and apparatus for manufacturing a transistor-outline (TO) ca...

Method and apparatus for manufacturing a transistor-outline (TO) ca...

Method and apparatus for manufacturing a transistor-outline (TO) ca...

Stacked land grid array package

Package for housing an optoelectronic assembly

Patents Applicationslast 30 patents

TEST, VALIDATION, AND DEBUG ARCHITECTURE

INTEGRATED CIRCUIT PACKAGE WITH SPATIALLY VARIED SOLDER RESIST OPEN...

INTEGRATED CIRCUIT PACKAGE WITH SPATIALLY VARIED SOLDER RESIST OPEN...

GAPPED ATTACHMENT STRUCTURES

Land grid array (LGA) socket with cells and method of fabrication a...

PICK-AND-PLACE CAP FOR SOCKET ASSEMBLY

SELF-BALANCED DUAL L-SHAPED SOCKET

Socket for land grid array package

LATERAL FORCE COUNTERING LOAD MECHANISM FOR LGA SOCKETS

EXTENDED PACKAGE SUBSTRATE

SOCKET ASSEMBLY THAT INCLUDES IMPROVED CONTACT ARRANGEMENT

Self-balanced dual L-shaped socket

Self-balanced land grid array socket

Stacked land grid array package

Stacked land grid array package

Optoelectronic module with integrated cooler

Package for housing an optoelectronic assembly

Method and apparatus for manufacturing a transistor-outline (TO) ca...

Method and apparatus for manufacturing a transistor-outline (TO) ca...

Method and apparatus for manufacturing a transistor -outline (TO) c...

Method and apparatus for manufacturing a transistor-outline (TO) ca...

Low-profile package for housing an optoelectronic assembly

Package for housing an optoelectronic assembly