Tin-Chee Lo

Person

Fishkill, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method, system and program product for autonomous error recovery fo...
- Patent number 7,739,557
- Issue date Jun 15, 2010
- International Business Machines Corporation
- Sandeep Brahmadathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On-Chip AC self-test controller
- Patent number 7,596,734
- Issue date Sep 29, 2009
- International Business Machines Corporation
- John D. Flanagan
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus, method and computer program product for dynamic arbitrat...
- Patent number 7,587,543
- Issue date Sep 8, 2009
- International Business Machines Corporation
- Daniele Di Genova
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for an on-chip AC self-test controller
- Patent number 7,430,698
- Issue date Sep 30, 2008
- International Business Machines Corporation
- John D. Flanagan
- G01 - MEASURING TESTING
Information Patent Grant
Method, system and program product for autonomous error recovery fo...
- Patent number 7,275,202
- Issue date Sep 25, 2007
- International Business Machines Corporation
- Sandeep Brahmadathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for performing a memory-mode write to cache
- Patent number 7,167,952
- Issue date Jan 23, 2007
- International Business Machines Corporation
- Krishna M. Desai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sequence alignment logic for generating output representing the slo...
- Patent number 7,076,676
- Issue date Jul 11, 2006
- International Business Machines Corporation
- Tin-chee Lo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for an on-chip AC self-test controller
- Patent number 7,058,866
- Issue date Jun 6, 2006
- International Business Machines Corporation
- John D. Flanagan
- G01 - MEASURING TESTING
Information Patent Grant
Method for using a portion of the system cache as a trace array
- Patent number 6,931,492
- Issue date Aug 16, 2005
- International Business Machines Corporation
- David B. Fox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital random noise generator
- Patent number 6,910,165
- Issue date Jun 21, 2005
- International Business Machines Corporation
- Howard H. Chen
- G01 - MEASURING TESTING
Information Patent Grant
Method and system for selecting data sampling phase for self timed...
- Patent number 6,839,861
- Issue date Jan 4, 2005
- International Business Machines Corporation
- Joseph Michael Hoke
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Slaves with identification and selection stages for group write
- Patent number 6,836,840
- Issue date Dec 28, 2004
- International Business Machines Corporation
- Tin-chee Lo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-port memory device and system for addressing the multi-port m...
- Patent number 6,594,196
- Issue date Jul 15, 2003
- International Business Machines Corporation
- Louis L Hsu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for dynamic bandwidth testing
- Patent number 5,970,052
- Issue date Oct 19, 1999
- International Business Machines Corporation
- Tin-Chee Lo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fault tolerant system based on voting
- Patent number 5,907,671
- Issue date May 25, 1999
- International Business Machines Corporation
- Chin-Long Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
ECC-compare path of cache directory logic improvements
- Patent number 5,822,338
- Issue date Oct 13, 1998
- International Business Machines Corporation
- Tin-Chee Lo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable computer system element with built-in self test method...
- Patent number 5,805,789
- Issue date Sep 8, 1998
- International Business Machines Corporation
- William Vincent Huott
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable ABIST microprocessor for testing arrays with two logic...
- Patent number 5,661,732
- Issue date Aug 26, 1997
- International Business Machines Corporation
- Tin-Chee Lo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable computer system element with built-in self test method...
- Patent number 5,659,551
- Issue date Aug 19, 1997
- International Business Machines Corporation
- William Vincent Huott
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Latch control circuit
- Patent number 5,565,808
- Issue date Oct 15, 1996
- International Business Machines Corporation
- Tin-Chee Lo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method of controlling signal transfer between self-resetting logic...
- Patent number 5,543,735
- Issue date Aug 6, 1996
- International Business Machines Corporation
- Tin-Chee Lo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Latch interface for self-reset logic
- Patent number 5,488,319
- Issue date Jan 30, 1996
- International Business Machines Corporation
- Tin-Chee Lo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory access system including a memory controller with memory redr...
- Patent number 5,479,640
- Issue date Dec 26, 1995
- International Business Machines Corporation
- Frank P. Cartman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for shortening memory fetch time relative to memory store ti...
- Patent number 5,359,722
- Issue date Oct 25, 1994
- International Business Machines Corporation
- Shiu K. Chan
- G11 - INFORMATION STORAGE
Information Patent Grant
Chip organization for an extendable memory structure providing busl...
- Patent number 5,138,705
- Issue date Aug 11, 1992
- International Business Machines Corporation
- Tin-Chee Lo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fault tolerant computer memory systems and components employing dua...
- Patent number 5,058,115
- Issue date Oct 15, 1991
- International Business Machines Corp.
- Robert M. Blake
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-functional differential cascode voltage switch logic
- Patent number 4,686,392
- Issue date Aug 11, 1987
- International Business Machines Corporation
- Tin-Chee Lo
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
ON-CHIP AC SELF-TEST CONTROLLER
- Publication number 20080313514
- Publication date Dec 18, 2008
- International Business Machines Corporation
- John D. Flanagan
- G01 - MEASURING TESTING
Information Patent Application
METHOD, SYSTEM AND PROGRAM PRODUCT FOR AUTONOMOUS ERROR RECOVERY FO...
- Publication number 20070240021
- Publication date Oct 11, 2007
- International Business Machines Corporation
- Sandeep Brahmadathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus, method and computer program product for dynamic arbitrat...
- Publication number 20070174530
- Publication date Jul 26, 2007
- International Business Machines Corporation
- Daniele Di Genova
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for an on-chip AC self-test controller
- Publication number 20060242509
- Publication date Oct 26, 2006
- International Business Machines Corporation
- John D. Flanagan
- G01 - MEASURING TESTING
Information Patent Application
Method, system and program product for autonomous error recovery fo...
- Publication number 20050229052
- Publication date Oct 13, 2005
- International Business Machines Corporation
- Sandeep Brahmadathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for performing a memory-mode write to cache
- Publication number 20050060494
- Publication date Mar 17, 2005
- International Business Machines Corporation
- Krishna M. Desai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Group write slave and a method for using same
- Publication number 20050038974
- Publication date Feb 17, 2005
- International Business Machines Corporation
- Tin-chee Lo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for an on-chip AC self-test controller
- Publication number 20030204800
- Publication date Oct 30, 2003
- International Business Machines Corporation
- John D. Flanagan
- G01 - MEASURING TESTING
Information Patent Application
Method for using a portion of the system cache as a trace array
- Publication number 20030088738
- Publication date May 8, 2003
- David B. Fox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Group write slave and a method for using same
- Publication number 20030023934
- Publication date Jan 30, 2003
- International Business Machines Corporation
- Tin-chee Lo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for selecting data sampling phase for self timed...
- Publication number 20030023891
- Publication date Jan 30, 2003
- International Business Machines Corporation
- Joseph Michael Hoke
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and system for background ECC scrubbing for a memory array
- Publication number 20030009721
- Publication date Jan 9, 2003
- International Business Machines Corporation
- Louis L. Hsu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Digital random noise generator
- Publication number 20020120898
- Publication date Aug 29, 2002
- International Business Machines Corporaton
- Howard H. Chen
- G01 - MEASURING TESTING
Information Patent Application
Multi-port memory device and system for addressing the multi-port m...
- Publication number 20020065997
- Publication date May 30, 2002
- Louis L. Hsu
- G06 - COMPUTING CALCULATING COUNTING

Tin-Chee Lo

Person

Patents Grantslast 30 patents

Method, system and program product for autonomous error recovery fo...

On-Chip AC self-test controller

Apparatus, method and computer program product for dynamic arbitrat...

Method and system for an on-chip AC self-test controller

Method, system and program product for autonomous error recovery fo...

Method and system for performing a memory-mode write to cache

Sequence alignment logic for generating output representing the slo...

Method and system for an on-chip AC self-test controller

Method for using a portion of the system cache as a trace array

Digital random noise generator

Method and system for selecting data sampling phase for self timed...

Slaves with identification and selection stages for group write

Multi-port memory device and system for addressing the multi-port m...

Method for dynamic bandwidth testing

Fault tolerant system based on voting

ECC-compare path of cache directory logic improvements

Programmable computer system element with built-in self test method...

Programmable ABIST microprocessor for testing arrays with two logic...

Programmable computer system element with built-in self test method...

Latch control circuit

Method of controlling signal transfer between self-resetting logic...

Latch interface for self-reset logic

Memory access system including a memory controller with memory redr...

Method for shortening memory fetch time relative to memory store ti...

Chip organization for an extendable memory structure providing busl...

Fault tolerant computer memory systems and components employing dua...

Multi-functional differential cascode voltage switch logic

Patents Applicationslast 30 patents

ON-CHIP AC SELF-TEST CONTROLLER

METHOD, SYSTEM AND PROGRAM PRODUCT FOR AUTONOMOUS ERROR RECOVERY FO...

Apparatus, method and computer program product for dynamic arbitrat...

Method and system for an on-chip AC self-test controller

Method, system and program product for autonomous error recovery fo...

Method and system for performing a memory-mode write to cache

Group write slave and a method for using same

Method and system for an on-chip AC self-test controller

Method for using a portion of the system cache as a trace array

Group write slave and a method for using same

Method and system for selecting data sampling phase for self timed...

Method and system for background ECC scrubbing for a memory array

Digital random noise generator

Multi-port memory device and system for addressing the multi-port m...