Ting-Pwu Yen

Person

Fremont, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method of forming local oxidation with sloped silicon recess
- Patent number 6,579,777
- Issue date Jun 17, 2003
- Cypress Semiconductor Corp.
- Ting P. Yen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Edge metal for interconnect layers
- Patent number 5,977,638
- Issue date Nov 2, 1999
- Cypress Semiconductor Corp.
- T. J. Rodgers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal plug local interconnect
- Patent number 5,965,924
- Issue date Oct 12, 1999
- Cypress Semiconductor Corp.
- Ting P. Yen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming robust interconnect and contact structures in a s...
- Patent number 5,861,676
- Issue date Jan 19, 1999
- Cypress Semiconductor Corp.
- Ting Yen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligning contact and interconnect structure
- Patent number 5,656,861
- Issue date Aug 12, 1997
- Paradigm Technology, Inc.
- Norman Godinho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for fabricating integrated circuits including openings to t...
- Patent number 5,620,919
- Issue date Apr 15, 1997
- Paradigm Technology, Inc.
- Norman Godinho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligning contact and interconnect structure
- Patent number 5,483,104
- Issue date Jan 9, 1996
- Paradigm Technology, Inc.
- Norman Godinho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure using local planarization with self-aligned...
- Patent number 5,477,074
- Issue date Dec 19, 1995
- Paradigm Technology, Inc.
- Ting-Pwu Yen
- C03 - GLASS MINERAL OR SLAG WOOL
Information Patent Grant
Programmable semiconductor integrated circuits having fusible links
- Patent number 5,465,004
- Issue date Nov 7, 1995
- North American Philips Corporation
- Sheldon C. P. Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor fabrication methods using overlapping masks
- Patent number 5,348,897
- Issue date Sep 20, 1994
- Paradigm Technology, Inc.
- Ting-Pwu Yen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor fabrication technique using local planarization with...
- Patent number 5,340,774
- Issue date Aug 23, 1994
- Paradigm Technology, Inc.
- Ting-Pwu Yen
- C03 - GLASS MINERAL OR SLAG WOOL
Information Patent Grant
High resistance Polysilicon load resistor
- Patent number 5,172,211
- Issue date Dec 15, 1992
- Paradigm Technology, Inc.
- Norman Godinho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a high resistance polysilicon load resistor
- Patent number 5,168,076
- Issue date Dec 1, 1992
- Paradigm Technology, Inc.
- Norman Godinho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligning contact and interconnect structure
- Patent number 5,166,771
- Issue date Nov 24, 1992
- Paradigm Technology, Inc.
- Norman Godinho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Compact SRAM cell layout
- Patent number 5,124,774
- Issue date Jun 23, 1992
- Paradigm Technology, Inc.
- Norman Godinho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication method using oxidation to control size of fusible link
- Patent number 5,015,604
- Issue date May 14, 1991
- North American Philips Corp., Signetics Division
- Sheldon C. P. Lim
- H01 - BASIC ELECTRIC ELEMENTS

Ting-Pwu Yen

Person

Patents Grantslast 30 patents

Method of forming local oxidation with sloped silicon recess

Edge metal for interconnect layers

Metal plug local interconnect

Method of forming robust interconnect and contact structures in a s...

Self-aligning contact and interconnect structure

Methods for fabricating integrated circuits including openings to t...

Self-aligning contact and interconnect structure

Semiconductor structure using local planarization with self-aligned...

Programmable semiconductor integrated circuits having fusible links

Transistor fabrication methods using overlapping masks

Semiconductor fabrication technique using local planarization with...

High resistance Polysilicon load resistor

Method of fabricating a high resistance polysilicon load resistor

Self-aligning contact and interconnect structure

Compact SRAM cell layout

Fabrication method using oxidation to control size of fusible link