Tom Y. Chi

Person

San Gabriel, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Process for providing clean lift-off of sputtered thin film layers
- Patent number 5,705,432
- Issue date Jan 6, 1998
- Hughes Aircraft Company
- Kusol Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a self-aligned double recess gate profile
- Patent number 5,556,797
- Issue date Sep 17, 1996
- Hughes Aircraft Company
- Tom Y. Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Field-effect transistor with high breakdown voltage provided by cha...
- Patent number 5,539,228
- Issue date Jul 23, 1996
- Hughes Aircraft Company
- Tom Y. Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual etchant process, particularly for gate recess fabrication in G...
- Patent number 5,436,201
- Issue date Jul 25, 1995
- Hughes Aircraft Company
- Tom Y. Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonding of integrated circuit chip to carrier using gold/tin eutect...
- Patent number 5,378,926
- Issue date Jan 3, 1995
- Hughes Aircraft Company
- Tom Y. Chi
- A61 - MEDICAL OR VETERINARY SCIENCE HYGIENE
Information Patent Grant
Maskless process for forming refractory metal layer in via holes of...
- Patent number 5,350,662
- Issue date Sep 27, 1994
- Hughes Aircraft Company
- Tom Y. Chi
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Distributed cell monolithic mircowave integrated circuit (MMIC) fie...
- Patent number 5,283,452
- Issue date Feb 1, 1994
- Hughes Aircraft Company
- Yi-Chi Shih
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonding of integrated circuit chip to carrier using gold/tin eutect...
- Patent number 5,156,998
- Issue date Oct 20, 1992
- Hughes Aircraft Company
- Tom Y. Chi
- H01 - BASIC ELECTRIC ELEMENTS

Person

Patents Grantslast 30 patents

Process for providing clean lift-off of sputtered thin film layers

Method of fabricating a self-aligned double recess gate profile

Field-effect transistor with high breakdown voltage provided by cha...

Dual etchant process, particularly for gate recess fabrication in G...

Bonding of integrated circuit chip to carrier using gold/tin eutect...

Maskless process for forming refractory metal layer in via holes of...

Distributed cell monolithic mircowave integrated circuit (MMIC) fie...

Bonding of integrated circuit chip to carrier using gold/tin eutect...