Tomohiro Hayashi

Person

Yokohama-shi, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Method of writing, erasing, and controlling memory for memory device
- Patent number 7,257,666
- Issue date Aug 14, 2007
- Fujitsu Limited
- Shinpei Komatsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Encryption circuit
- Patent number 7,158,638
- Issue date Jan 2, 2007
- Fujitsu Limited
- Souichi Okada
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method of writing, erasing, and controlling memory for memory device
- Patent number 6,766,409
- Issue date Jul 20, 2004
- Fujitsu Limited
- Shinpei Komatsu
- G11 - INFORMATION STORAGE
Information Patent Grant
CPU controlled memory controlling device for accessing operational...
- Patent number 6,643,730
- Issue date Nov 4, 2003
- Fujitsu Limited
- Yoshiki Okumura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of writing, erasing, and controlling memory for memory device
- Patent number 6,584,579
- Issue date Jun 24, 2003
- Fujitsu Limited
- Shinpei Komatsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory unit and buffer access control circuit for updating an addre...
- Patent number 6,449,681
- Issue date Sep 10, 2002
- Fujitsu Limited
- Shinkichi Gama
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory card
- Patent number 6,418,501
- Issue date Jul 9, 2002
- Fujitsu Limited
- Shinkichi Gama
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory unit and buffer access control circuit for updating an addre...
- Patent number 6,339,809
- Issue date Jan 15, 2002
- Fujitsu Limited
- Shinkichi Gama
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit for generating a chip-enable signal for a multiple chip con...
- Patent number 6,289,411
- Issue date Sep 11, 2001
- Fujitsu Limited
- Yoshiki Okumura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of writing, erasing, and controlling memory for memory device
- Patent number 6,161,163
- Issue date Dec 12, 2000
- Fujitsu Limited
- Shinpei Komatsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of writing, erasing, and controlling memory and memory devic...
- Patent number 6,125,424
- Issue date Sep 26, 2000
- Fujitsu Limited
- Shinpei Komatsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Simultaneously writing to and erasing two commonly numbered sectors
- Patent number 5,983,312
- Issue date Nov 9, 1999
- Fujitsu Limited
- Shinpei Komatsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiple-valued memory and data access method for multiple-valued m...
- Patent number 5,907,504
- Issue date May 25, 1999
- Fujitsu Limited
- Tomohiro Hayashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Device accessing a database using one of old definition information...
- Patent number 5,881,378
- Issue date Mar 9, 1999
- Fujitsu Limited
- Katsumi Hayashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Derived data base processing system enabling one program to access...
- Patent number 5,873,088
- Issue date Feb 16, 1999
- Fujitsu Limited
- Katsumi Hayashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of developing and modifying self-describing database managem...
- Patent number 5,857,195
- Issue date Jan 5, 1999
- Fujitsu Limited
- Katsumi Hayashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for controlling the writing and erasing of inf...
- Patent number 5,802,551
- Issue date Sep 1, 1998
- Fujitsu Limited
- Shinpei Komatsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Database generic composite structure processing system
- Patent number 5,742,809
- Issue date Apr 21, 1998
- Fujitsu Limited
- Katsumi Hayashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for detecting and correcting error by means of a high-dimens...
- Patent number 5,708,667
- Issue date Jan 13, 1998
- Fujitsu Limited
- Tomohiro Hayashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Log data management system having a plurality of processing units a...
- Patent number 5,696,967
- Issue date Dec 9, 1997
- Fujitsu Limited
- Katsumi Hayashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Symmetric/asymmetric shared processing operation in a tightly coupl...
- Patent number 5,649,184
- Issue date Jul 15, 1997
- Fujitsu Limited
- Katsumi Hayashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing system for dynamically switching access control pro...
- Patent number 5,553,303
- Issue date Sep 3, 1996
- Fujitsu Limited
- Katsumi Hayashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for heterogenous database access by generating...
- Patent number 5,408,652
- Issue date Apr 18, 1995
- Fujitsu Limited
- Katsumi Hayashi
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Method of writing, erasing, and controlling memory for memory device
- Publication number 20040168017
- Publication date Aug 26, 2004
- FUJITSU LIMITED
- Tomohiro Hayashi
- G11 - INFORMATION STORAGE
Information Patent Application
Method of writing, erasing, and controlling memory for memory device
- Publication number 20040168013
- Publication date Aug 26, 2004
- FUJITSU LIMITED OF Kawasaki, Japan
- Shinpei Komatsu
- G11 - INFORMATION STORAGE
Information Patent Application
Method of writing, erasing, and controlling memory for memory device
- Publication number 20030196029
- Publication date Oct 16, 2003
- FUJITSU LIMITED
- Shinpei Komatsu
- G11 - INFORMATION STORAGE
Information Patent Application
Encryption circuit
- Publication number 20030108195
- Publication date Jun 12, 2003
- FUJITSU LIMITED
- Souichi Okada
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Memory unit and buffer access control circuit for updating an addre...
- Publication number 20020032830
- Publication date Mar 14, 2002
- FUJITSU LIMITED
- Shinkichi Gama
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Generation of chip-enable signal appropriate for employed chip conf...
- Publication number 20020026555
- Publication date Feb 28, 2002
- FUJITSU LIMITED
- Yoshiki Okumura
- G06 - COMPUTING CALCULATING COUNTING

Tomohiro Hayashi

Person

Patents Grantslast 30 patents

Method of writing, erasing, and controlling memory for memory device

Encryption circuit

Method of writing, erasing, and controlling memory for memory device

CPU controlled memory controlling device for accessing operational...

Method of writing, erasing, and controlling memory for memory device

Memory unit and buffer access control circuit for updating an addre...

Memory card

Memory unit and buffer access control circuit for updating an addre...

Circuit for generating a chip-enable signal for a multiple chip con...

Method of writing, erasing, and controlling memory for memory device

Method of writing, erasing, and controlling memory and memory devic...

Simultaneously writing to and erasing two commonly numbered sectors

Multiple-valued memory and data access method for multiple-valued m...

Device accessing a database using one of old definition information...

Derived data base processing system enabling one program to access...

Method of developing and modifying self-describing database managem...

Method and apparatus for controlling the writing and erasing of inf...

Database generic composite structure processing system

Method for detecting and correcting error by means of a high-dimens...

Log data management system having a plurality of processing units a...

Symmetric/asymmetric shared processing operation in a tightly coupl...

Data processing system for dynamically switching access control pro...

Method and apparatus for heterogenous database access by generating...

Patents Applicationslast 30 patents

Method of writing, erasing, and controlling memory for memory device

Method of writing, erasing, and controlling memory for memory device

Method of writing, erasing, and controlling memory for memory device

Encryption circuit

Memory unit and buffer access control circuit for updating an addre...

Generation of chip-enable signal appropriate for employed chip conf...