Tomoya Saito

Person

Beacon, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
High speed operation method for twin MONOS metal bit array
- Patent number 8,174,885
- Issue date May 8, 2012
- Halo LSI Inc.
- Tomoko Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
High speed operation method for twin MONOS metal bit array
- Patent number 7,936,604
- Issue date May 3, 2011
- Halo LSI Inc.
- Tomoko Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Twin insulator charge storage device operation and its fabrication...
- Patent number 7,411,247
- Issue date Aug 12, 2008
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Twin insulator charge storage device operation and its fabrication...
- Patent number 7,394,703
- Issue date Jul 1, 2008
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Twin insulator charge storage device operation and its fabrication...
- Patent number 7,391,653
- Issue date Jun 24, 2008
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Twin insulator charge storage device operation and its fabrication...
- Patent number 7,382,662
- Issue date Jun 3, 2008
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Twin insulator charge storage device operation and its fabrication...
- Patent number 7,382,659
- Issue date Jun 3, 2008
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Twin insulator charge storage device operation and its fabrication...
- Patent number 7,359,250
- Issue date Apr 15, 2008
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile memory array organization and usage
- Patent number 7,190,603
- Issue date Mar 13, 2007
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Twin insulator charge storage device operation and its fabrication...
- Patent number 7,170,132
- Issue date Jan 30, 2007
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Stitch and select implementation in twin MONOS array
- Patent number 7,118,961
- Issue date Oct 10, 2006
- Halo LSI, Inc.
- Tomoko Ogura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Twin insulator charge storage device operation and its fabrication...
- Patent number 7,046,556
- Issue date May 16, 2006
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Array architecture and operation methods for a nonvolatile memory
- Patent number 7,006,378
- Issue date Feb 28, 2006
- Halo LSI, Inc.
- Tomoya Saito
- G11 - INFORMATION STORAGE
Information Patent Grant
Twin NAND device structure, array operations and fabrication method
- Patent number 6,998,658
- Issue date Feb 14, 2006
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Twin insulator charge storage device operation and its fabrication...
- Patent number 6,900,098
- Issue date May 31, 2005
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Simplified twin monos fabrication method with three extra masks to...
- Patent number 6,838,344
- Issue date Jan 4, 2005
- Halo LSI, Inc.
- Kimihiro Satoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Twin NAND device structure, array operations and fabrication method
- Patent number 6,825,084
- Issue date Nov 30, 2004
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Stitch and select implementation in twin MONOS array
- Patent number 6,759,290
- Issue date Jul 6, 2004
- Halo LSI, Inc.
- Tomoko Ogura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Simplified twin monos fabrication method with three extra masks to...
- Patent number 6,756,271
- Issue date Jun 29, 2004
- Halo LSI, Inc.
- Kimihiro Satoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Twin MONOS cell fabrication method and array organization
- Patent number 6,707,079
- Issue date Mar 16, 2004
- Halo LSI, Inc.
- Kumihiro Satoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Twin NAND device structure, array operations and fabrication method
- Patent number 6,670,240
- Issue date Dec 30, 2003
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Twin MONOS array metal bit organization and single cell operation
- Patent number 6,631,088
- Issue date Oct 7, 2003
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Twin MONOS cell fabrication method and array organization
- Patent number 6,531,350
- Issue date Mar 11, 2003
- Halo, Inc.
- Kimihiro Satoh
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
High speed operation method for Twin MONOS metal bit array
- Publication number 20110205798
- Publication date Aug 25, 2011
- Halo LSI, Inc.
- Tomoko Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Twin insulator charge storage device operation and its fabrication...
- Publication number 20070114597
- Publication date May 24, 2007
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
High speed operation method for twin MONOS metal bit array
- Publication number 20070047307
- Publication date Mar 1, 2007
- HALO LSI INC.
- Tomoko Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Twin insulator charge storage device operation and its fabrication...
- Publication number 20060227622
- Publication date Oct 12, 2006
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Twin insulator charge storage device operation and its fabrication...
- Publication number 20060221706
- Publication date Oct 5, 2006
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Twin insulator charge storage device operation and its fabrication...
- Publication number 20060203562
- Publication date Sep 14, 2006
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Twin insulator charge storage device operation and its fabrication...
- Publication number 20060198200
- Publication date Sep 7, 2006
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Twin insulator charge storage device operation and its fabrication...
- Publication number 20060187709
- Publication date Aug 24, 2006
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Nonvolatile memory array organization and usage
- Publication number 20050248984
- Publication date Nov 10, 2005
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Twin insulator charge storage device operation and its fabrication...
- Publication number 20050164451
- Publication date Jul 28, 2005
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Twin insulator charge storage device operation and its fabrication...
- Publication number 20050145928
- Publication date Jul 7, 2005
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Simplified twin monos fabrication method with three extra masks to...
- Publication number 20040219751
- Publication date Nov 4, 2004
- Halo LSI, Inc.
- Kimihiro Satoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stitch and select implementation in twin MONOS array
- Publication number 20040166630
- Publication date Aug 26, 2004
- Halo LSI, Inc.
- Tomoko Ogura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Twin NAND device structure, array operations and fabrication method
- Publication number 20040092066
- Publication date May 13, 2004
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Twin NAND device structure, array operations and fabrication method
- Publication number 20040087087
- Publication date May 6, 2004
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Twin MONOS cell fabrication method and array organization
- Publication number 20030143792
- Publication date Jul 31, 2003
- Halo LSI, Inc.
- Kimihiro Satoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Twin NAND device structure, array operations and fabrication method
- Publication number 20030032243
- Publication date Feb 13, 2003
- Seiki Ogura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Twin MONOS array metal bit organization and single cell operation
- Publication number 20030022441
- Publication date Jan 30, 2003
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Stitch and select implementation in twin MONOS array
- Publication number 20020168813
- Publication date Nov 14, 2002
- Tomoko Ogura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Twin monos cell fabrication method and array organization
- Publication number 20020137296
- Publication date Sep 26, 2002
- Halo LSI Design and Device Technology Inc.
- Kimihiro Satoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Usage of word voltage assistance in twin MONOS cell during program...
- Publication number 20020067641
- Publication date Jun 6, 2002
- Halo Lsi Device & Design Technology Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE

Tomoya Saito

Person

Patents Grantslast 30 patents

High speed operation method for twin MONOS metal bit array

High speed operation method for twin MONOS metal bit array

Twin insulator charge storage device operation and its fabrication...

Twin insulator charge storage device operation and its fabrication...

Twin insulator charge storage device operation and its fabrication...

Twin insulator charge storage device operation and its fabrication...

Twin insulator charge storage device operation and its fabrication...

Twin insulator charge storage device operation and its fabrication...

Nonvolatile memory array organization and usage

Twin insulator charge storage device operation and its fabrication...

Stitch and select implementation in twin MONOS array

Twin insulator charge storage device operation and its fabrication...

Array architecture and operation methods for a nonvolatile memory

Twin NAND device structure, array operations and fabrication method

Twin insulator charge storage device operation and its fabrication...

Simplified twin monos fabrication method with three extra masks to...

Twin NAND device structure, array operations and fabrication method

Stitch and select implementation in twin MONOS array

Simplified twin monos fabrication method with three extra masks to...

Twin MONOS cell fabrication method and array organization

Twin NAND device structure, array operations and fabrication method

Twin MONOS array metal bit organization and single cell operation

Twin MONOS cell fabrication method and array organization

Patents Applicationslast 30 patents

High speed operation method for Twin MONOS metal bit array

Twin insulator charge storage device operation and its fabrication...

High speed operation method for twin MONOS metal bit array

Twin insulator charge storage device operation and its fabrication...

Twin insulator charge storage device operation and its fabrication...

Twin insulator charge storage device operation and its fabrication...

Twin insulator charge storage device operation and its fabrication...

Twin insulator charge storage device operation and its fabrication...

Nonvolatile memory array organization and usage

Twin insulator charge storage device operation and its fabrication...

Twin insulator charge storage device operation and its fabrication...

Simplified twin monos fabrication method with three extra masks to...

Stitch and select implementation in twin MONOS array

Twin NAND device structure, array operations and fabrication method

Twin NAND device structure, array operations and fabrication method

Twin MONOS cell fabrication method and array organization

Twin NAND device structure, array operations and fabrication method

Twin MONOS array metal bit organization and single cell operation

Stitch and select implementation in twin MONOS array

Twin monos cell fabrication method and array organization

Usage of word voltage assistance in twin MONOS cell during program...