Toshihiko Kurihara

Person

Kanagawa-ken, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Data processor having cache memory
- Patent number 7,240,159
- Issue date Jul 3, 2007
- Hitachi, Ltd.
- Takashi Hotta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for measuring memory latency in a hierarchical memory system
- Patent number 7,051,177
- Issue date May 23, 2006
- International Business Machines Corporation
- Hung Qui Le
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Analyzing instruction completion delays in a processor
- Patent number 7,047,398
- Issue date May 16, 2006
- International Business Machines Corporation
- Toshihiko Kurihara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing device with prefetch instructions having indicator bits...
- Patent number 7,028,160
- Issue date Apr 11, 2006
- Hitachi, Ltd.
- Kenji Matsubara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing device with prefetch instructions having indicator bits...
- Patent number 7,028,159
- Issue date Apr 11, 2006
- Hitachi, Ltd.
- Kenji Matsubara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Counting latencies of an instruction table flush, refill and instru...
- Patent number 6,970,999
- Issue date Nov 29, 2005
- International Business Machines Corporation
- Toshihiko Kurihara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Speculative counting of performance events with rewind counter
- Patent number 6,910,120
- Issue date Jun 21, 2005
- International Business Machines Corporation
- Hung Qui Le
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processor having cache memory
- Patent number 6,848,027
- Issue date Jan 25, 2005
- Hitachi, Ltd.
- Takashi Hotta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing device which prefetches instructions having indicator bi...
- Patent number 6,598,126
- Issue date Jul 22, 2003
- Hitachi, Ltd.
- Kenji Matsubara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Information processing system with prefetch instructions having ind...
- Patent number 6,598,127
- Issue date Jul 22, 2003
- Hitachi, Ltd.
- Kenji Matsubara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processor having cache memory
- Patent number 6,587,927
- Issue date Jul 1, 2003
- Hitachi, Ltd.
- Takashi Hotta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Information processing system with prefetch instructions having ind...
- Patent number 6,381,679
- Issue date Apr 30, 2002
- Hitachi, Ltd.
- Kenji Matsubara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processor with variable types of cache memories and a controll...
- Patent number 6,275,902
- Issue date Aug 14, 2001
- Hitachi, Ltd.
- Takashi Hotta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Information processing unit and method for controlling a hierarchic...
- Patent number 6,131,145
- Issue date Oct 10, 2000
- Hitachi, Ltd.
- Kenji Matsubara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processor with variable types of cache memories
- Patent number 5,848,432
- Issue date Dec 8, 1998
- Hitachi, Ltd.
- Takashi Hotta
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Data processor having cache memory
- Publication number 20070233959
- Publication date Oct 4, 2007
- Takashi Hotta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data processor having cache memory
- Publication number 20050102472
- Publication date May 12, 2005
- Takashi Hotta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for identifying instruction completion delays in...
- Publication number 20040024994
- Publication date Feb 5, 2004
- International Business Machines Corporation
- Toshihiko Kurihara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for measuring memory latency in a hierarchical memory system
- Publication number 20040024982
- Publication date Feb 5, 2004
- International Business Machines Corpoation
- Hung Qui Le
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cycles per instruction stack in a computer processor
- Publication number 20040025146
- Publication date Feb 5, 2004
- International Business Machines Corp.
- Toshihiko Kurihara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Speculative counting of performance events with rewind counter
- Publication number 20040024996
- Publication date Feb 5, 2004
- International Business Machines Corporation
- Hung Qui Le
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Information processing system with prefetch instructions having ind...
- Publication number 20030208659
- Publication date Nov 6, 2003
- Kenji Matsubara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data processor having cache memory
- Publication number 20030204676
- Publication date Oct 30, 2003
- Takashi Hotta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processing device which prefetches instruction having indicator bit...
- Publication number 20030196045
- Publication date Oct 16, 2003
- Kenji Matsubara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INFORMATION PROCESSING SYSTEM WITH PREFETCH INSTRUCTIONS HAVING IND...
- Publication number 20020083272
- Publication date Jun 27, 2002
- Kenji Matsubara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Information processing system with prefetch instructions having ind...
- Publication number 20020083273
- Publication date Jun 27, 2002
- Kenji Matsubara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data processor having cache memory
- Publication number 20010037432
- Publication date Nov 1, 2001
- Takashi Hotta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cache memory apparatus and data processing system
- Publication number 20010032297
- Publication date Oct 18, 2001
- Naoto Morikawa
- G06 - COMPUTING CALCULATING COUNTING

Toshihiko Kurihara

Person

Patents Grantslast 30 patents

Data processor having cache memory

Method for measuring memory latency in a hierarchical memory system

Analyzing instruction completion delays in a processor

Processing device with prefetch instructions having indicator bits...

Processing device with prefetch instructions having indicator bits...

Counting latencies of an instruction table flush, refill and instru...

Speculative counting of performance events with rewind counter

Data processor having cache memory

Processing device which prefetches instructions having indicator bi...

Information processing system with prefetch instructions having ind...

Data processor having cache memory

Information processing system with prefetch instructions having ind...

Data processor with variable types of cache memories and a controll...

Information processing unit and method for controlling a hierarchic...

Data processor with variable types of cache memories

Patents Applicationslast 30 patents

Data processor having cache memory

Data processor having cache memory

Method and system for identifying instruction completion delays in...

Method for measuring memory latency in a hierarchical memory system

Cycles per instruction stack in a computer processor

Speculative counting of performance events with rewind counter

Information processing system with prefetch instructions having ind...

Data processor having cache memory

Processing device which prefetches instruction having indicator bit...

INFORMATION PROCESSING SYSTEM WITH PREFETCH INSTRUCTIONS HAVING IND...

Information processing system with prefetch instructions having ind...

Data processor having cache memory

Cache memory apparatus and data processing system