Tsu-Jae King

Person

People

Patents Grantslast 30 patents

Information Patent Grant
Integrated circuit on corrugated substrate
- Patent number 8,786,057
- Issue date Jul 22, 2014
- Synopsys, Inc.
- Tsu-Jae King
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Damascene process for use in fabricating semiconductor structures h...
- Patent number 8,329,559
- Issue date Dec 11, 2012
- The Regents of the University of California
- Hideki Takeuchi
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Metal-insulator-metal (MIM) switching devices
- Patent number 8,044,442
- Issue date Oct 25, 2011
- The Regents of the University of California
- Hei Kam
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Methods of designing an integrated circuit on corrugated substrate
- Patent number 7,960,232
- Issue date Jun 14, 2011
- Synopsys, Inc.
- Tsu-Jae King
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Nano-electro-mechanical memory cells and devices
- Patent number 7,839,710
- Issue date Nov 23, 2010
- The Regents of the University of California
- Hei Kam
- G11 - INFORMATION STORAGE
Information Patent Grant
Complementary field-effect transistors having enhanced performance...
- Patent number 7,649,230
- Issue date Jan 19, 2010
- The Regents of the University of California
- Kyoungsub Shin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Two bit/four bit SONOS flash memory cell
- Patent number 7,629,640
- Issue date Dec 8, 2009
- The Regents of the University of California
- Min She
- G11 - INFORMATION STORAGE
Information Patent Grant
Process for controlling performance characteristics of a negative d...
- Patent number 7,557,009
- Issue date Jul 7, 2009
- Synopsys, Inc.
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit on corrugated substrate
- Patent number 7,528,465
- Issue date May 5, 2009
- Synopsys, Inc.
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Negative differential resistance field effect transistor for implem...
- Patent number 7,453,083
- Issue date Nov 18, 2008
- Synopsys, Inc.
- Tsu-Jae King
- G11 - INFORMATION STORAGE
Information Patent Grant
Compact static memory cell with non-volatile storage capability
- Patent number 7,266,010
- Issue date Sep 4, 2007
- Synopsys, Inc.
- Tsu-Jae King
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of IC production using corrugated substrate
- Patent number 7,265,008
- Issue date Sep 4, 2007
- Synopsys, Inc.
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Damascene process for use in fabricating semiconductor structures h...
- Patent number 7,256,107
- Issue date Aug 14, 2007
- The Regents of the University of California
- Hideki Takeuchi
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Method of making adaptive negative differential resistance device
- Patent number 7,254,050
- Issue date Aug 7, 2007
- Synopsys, Inc.
- Tsu-Jae King
- G11 - INFORMATION STORAGE
Information Patent Grant
Segmented channel MOS transistor
- Patent number 7,247,887
- Issue date Jul 24, 2007
- Synopsys, Inc.
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for controlling performance characteristics of a negative d...
- Patent number 7,220,636
- Issue date May 22, 2007
- Synopsys, Inc.
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit on corrugated substrate
- Patent number 7,190,050
- Issue date Mar 13, 2007
- Synopsys, Inc.
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Insulated-gate field-effect transistor integrated with negative dif...
- Patent number 7,186,619
- Issue date Mar 6, 2007
- Synopsys, Inc.
- Tsu-Jae King
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of forming a negative differential resistance device
- Patent number 7,186,621
- Issue date Mar 6, 2007
- Progressant Technologies, Inc.
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Silicon on insulator (SOI) negative differential resistance (NDR) b...
- Patent number 7,187,028
- Issue date Mar 6, 2007
- Synopsys, Inc.
- Tsu-Jae King
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual work function CMOS gate technology based on metal interdiffusion
- Patent number 7,141,858
- Issue date Nov 28, 2006
- The Regents of the University of California
- Igor Polishchuk
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a negative differential resistance device
- Patent number 7,113,423
- Issue date Sep 26, 2006
- Progressant Technologies, Inc.
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS compatible process for making a charge trapping device
- Patent number 7,109,078
- Issue date Sep 19, 2006
- Progressant Technologies, Inc.
- Tsu-Jae King
- G11 - INFORMATION STORAGE
Information Patent Grant
Negative differential resistance (NDR) elements and memory device u...
- Patent number 7,098,472
- Issue date Aug 29, 2006
- Progressant Technologies, Inc.
- Tsu-Jae King
- G11 - INFORMATION STORAGE
Information Patent Grant
Variable voltage supply bias and methods for negative differential...
- Patent number 7,095,659
- Issue date Aug 22, 2006
- Progressant Technologies, Inc.
- Tsu-Jae King
- G11 - INFORMATION STORAGE
Information Patent Grant
Ion beam extractor with counterbore
- Patent number 7,084,407
- Issue date Aug 1, 2006
- The Regents of the University of California
- Qing Ji
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Charge trapping device
- Patent number 7,067,873
- Issue date Jun 27, 2006
- Progressant Technologies, Inc.
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of testing/stressing a charge trapping device
- Patent number 7,060,524
- Issue date Jun 13, 2006
- Progressant Technologies, Inc.
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Two terminal silicon based negative differential resistance device
- Patent number 7,016,224
- Issue date Mar 21, 2006
- Tsu-Jae King
- G11 - INFORMATION STORAGE
Information Patent Grant
Charge trapping device and method of forming the same
- Patent number 7,015,536
- Issue date Mar 21, 2006
- Progressant Technologies, Inc.
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
DAMASCENE PROCESS FOR USE IN FABRICATING SEMICONDUCTOR STRUCTURES H...
- Publication number 20120171798
- Publication date Jul 5, 2012
- The Regents of the University of California
- Hideki Takeuchi
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Integrated Circuit On Corrugated Substrate
- Publication number 20090181477
- Publication date Jul 16, 2009
- Synopsys, Inc.
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METAL-INSULATOR-METAL (MIM) SWITCHING DEVICES
- Publication number 20090128221
- Publication date May 21, 2009
- The Regents of the University of California
- Hei Kam
- G11 - INFORMATION STORAGE
Information Patent Application
NANO-ELECTRO-MECHANICAL MEMORY CELLS AND DEVICES
- Publication number 20090129139
- Publication date May 21, 2009
- The Regents of the University of California
- Hei Kam
- G11 - INFORMATION STORAGE
Information Patent Application
Low-voltage memory having flexible gate charging element
- Publication number 20090121273
- Publication date May 14, 2009
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuit On Corrugated Substrate
- Publication number 20080290470
- Publication date Nov 27, 2008
- Synopsys, Inc.
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process For Controlling Performance Characteristics Of A Negative D...
- Publication number 20080020524
- Publication date Jan 24, 2008
- Synopsys Inc.
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FINFET-BASED SRAM WITH FEEDBACK
- Publication number 20070183185
- Publication date Aug 9, 2007
- The Regents of the University of California
- Zheng Guo
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-BIT-PER-CELL NVM STRUCTURES AND ARCHITECTURE
- Publication number 20070164352
- Publication date Jul 19, 2007
- The Regents of the University of California
- Alvaro Padilla
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuit On Corrugated Substrate
- Publication number 20070132053
- Publication date Jun 14, 2007
- Synopsys Inc.
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Compact static memory cell with non-volatile storage capability
- Publication number 20070121371
- Publication date May 31, 2007
- Progressant Technologies, Inc.
- Tsu-Jae King
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated circuit on corrugated substrate
- Publication number 20070001232
- Publication date Jan 4, 2007
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of IC production using corrugated substrate
- Publication number 20070004113
- Publication date Jan 4, 2007
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Segmented channel MOS transistor
- Publication number 20070001237
- Publication date Jan 4, 2007
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Complementary field-effect transistors having enhanced performance...
- Publication number 20060284255
- Publication date Dec 21, 2006
- The Regents of the University of California.
- Kyoungsub Shin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Charge Trapping Device
- Publication number 20060197122
- Publication date Sep 7, 2006
- Progressant Technologies, Inc.
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Variable voltage supply bias and methods for negative differential...
- Publication number 20060028881
- Publication date Feb 9, 2006
- Progressant Technologies, Inc.
- Tsu-Jae King
- G11 - INFORMATION STORAGE
Information Patent Application
Negative differential resistance (NDR) elements and memory device u...
- Publication number 20060007773
- Publication date Jan 12, 2006
- Progressant Technologies, Inc.
- Tsu-Jae King
- G11 - INFORMATION STORAGE
Information Patent Application
Negative differential resistance pull up element for DRAM
- Publication number 20050269628
- Publication date Dec 8, 2005
- Progressant Technologies, Inc.
- Tsu-Jae King
- G11 - INFORMATION STORAGE
Information Patent Application
Method of forming a negative differential resistance device
- Publication number 20050260798
- Publication date Nov 24, 2005
- Progressant Technologies, Inc.
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming a negative differential resistance device
- Publication number 20050253133
- Publication date Nov 17, 2005
- Progressant Technologies, Inc.
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Damascene process for use in fabricating semiconductor structures h...
- Publication number 20050250236
- Publication date Nov 10, 2005
- The Regents of the University of California.
- Hideki Takeuchi
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Two bit/four bit SONOS flash memory cell
- Publication number 20050242391
- Publication date Nov 3, 2005
- The Regents of the University of California.
- Min She
- G11 - INFORMATION STORAGE
Information Patent Application
Flash memory devices using large electron affinity material for cha...
- Publication number 20050167734
- Publication date Aug 4, 2005
- The Regents of the University of California
- Min She
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Charge trapping device and method of forming the same
- Publication number 20050156158
- Publication date Jul 21, 2005
- Progressant Technologies, Inc.
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process for controlling performance characteristics of a negative d...
- Publication number 20050153461
- Publication date Jul 14, 2005
- Progressant Technologies, Inc.
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Negative differential resistance (NDR) memory device with reduced s...
- Publication number 20050145955
- Publication date Jul 7, 2005
- Progressant Technologies, Inc.
- Tsu-Jae King
- G11 - INFORMATION STORAGE
Information Patent Application
Enhanced read and write methods for negative differential resistanc...
- Publication number 20050128797
- Publication date Jun 16, 2005
- Progressant Technologies, Inc.
- Tsu-Jae King
- G11 - INFORMATION STORAGE
Information Patent Application
Silicon on insulator (SOI) negative differential resistance (NDR) b...
- Publication number 20050121664
- Publication date Jun 9, 2005
- Progressant Technologies, Inc.
- Tsu-Jae King
- G11 - INFORMATION STORAGE
Information Patent Application
Methods of testing/stressing a charge trapping device
- Publication number 20050106765
- Publication date May 19, 2005
- Tsu-Jae King
- H01 - BASIC ELECTRIC ELEMENTS

Tsu-Jae King

Person

Patents Grantslast 30 patents

Integrated circuit on corrugated substrate

Damascene process for use in fabricating semiconductor structures h...

Metal-insulator-metal (MIM) switching devices

Methods of designing an integrated circuit on corrugated substrate

Nano-electro-mechanical memory cells and devices

Complementary field-effect transistors having enhanced performance...

Two bit/four bit SONOS flash memory cell

Process for controlling performance characteristics of a negative d...

Integrated circuit on corrugated substrate

Negative differential resistance field effect transistor for implem...

Compact static memory cell with non-volatile storage capability

Method of IC production using corrugated substrate

Damascene process for use in fabricating semiconductor structures h...

Method of making adaptive negative differential resistance device

Segmented channel MOS transistor

Process for controlling performance characteristics of a negative d...

Integrated circuit on corrugated substrate

Insulated-gate field-effect transistor integrated with negative dif...

Method of forming a negative differential resistance device

Silicon on insulator (SOI) negative differential resistance (NDR) b...

Dual work function CMOS gate technology based on metal interdiffusion

Method of forming a negative differential resistance device

CMOS compatible process for making a charge trapping device

Negative differential resistance (NDR) elements and memory device u...

Variable voltage supply bias and methods for negative differential...

Ion beam extractor with counterbore

Charge trapping device

Methods of testing/stressing a charge trapping device

Two terminal silicon based negative differential resistance device

Charge trapping device and method of forming the same

Patents Applicationslast 30 patents

DAMASCENE PROCESS FOR USE IN FABRICATING SEMICONDUCTOR STRUCTURES H...

Integrated Circuit On Corrugated Substrate

METAL-INSULATOR-METAL (MIM) SWITCHING DEVICES

NANO-ELECTRO-MECHANICAL MEMORY CELLS AND DEVICES

Low-voltage memory having flexible gate charging element

Integrated Circuit On Corrugated Substrate

Process For Controlling Performance Characteristics Of A Negative D...

FINFET-BASED SRAM WITH FEEDBACK

MULTI-BIT-PER-CELL NVM STRUCTURES AND ARCHITECTURE

Integrated Circuit On Corrugated Substrate

Compact static memory cell with non-volatile storage capability

Integrated circuit on corrugated substrate

Method of IC production using corrugated substrate

Segmented channel MOS transistor

Complementary field-effect transistors having enhanced performance...

Charge Trapping Device

Variable voltage supply bias and methods for negative differential...

Negative differential resistance (NDR) elements and memory device u...

Negative differential resistance pull up element for DRAM

Method of forming a negative differential resistance device

Method of forming a negative differential resistance device

Damascene process for use in fabricating semiconductor structures h...

Two bit/four bit SONOS flash memory cell

Flash memory devices using large electron affinity material for cha...

Charge trapping device and method of forming the same

Process for controlling performance characteristics of a negative d...

Negative differential resistance (NDR) memory device with reduced s...

Enhanced read and write methods for negative differential resistanc...

Silicon on insulator (SOI) negative differential resistance (NDR) b...

Methods of testing/stressing a charge trapping device