Tsyr-Chyang Ho

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Flash memory controller with calibrated data communication
- Patent number 10,310,999
- Issue date Jun 4, 2019
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller that calibrates a transmit timing offset
- Patent number 9,785,589
- Issue date Oct 10, 2017
- Rambus Inc.
- Jared LeVan Zerbe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Flash memory controller with calibrated data communication
- Patent number 9,405,678
- Issue date Aug 2, 2016
- Rambus Inc.
- Jared LeVan Zerbe
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system with calibrated data communication
- Patent number 9,164,933
- Issue date Oct 20, 2015
- Rambus Inc.
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller with circuitry to set memory device-specific refe...
- Patent number 8,948,212
- Issue date Feb 3, 2015
- Rambus Inc.
- Jared LeVan Zerbe
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system with calibrated data communication
- Patent number 8,630,317
- Issue date Jan 14, 2014
- Rambus Inc.
- Jared LeVan Zerbe
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system with calibrated data communication
- Patent number 8,170,067
- Issue date May 1, 2012
- Rambus Inc.
- Jared LeVan Zerbe
- G11 - INFORMATION STORAGE
Information Patent Grant
Calibrated data communication system and method
- Patent number 7,535,933
- Issue date May 19, 2009
- Rambus Inc.
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Calibrated data communication system and method
- Patent number 7,042,914
- Issue date May 9, 2006
- Rambus Inc.
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit with timing adjustment mechanism and method
- Patent number 6,950,956
- Issue date Sep 27, 2005
- Rambus Inc.
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Phase detector with minimized phase detection error
- Patent number 6,642,746
- Issue date Nov 4, 2003
- Rambus Inc.
- Kevin S. Donnelly
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Bus system optimization
- Patent number 6,643,787
- Issue date Nov 4, 2003
- Rambus Inc.
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Phase detector with minimized phase detection error
- Patent number 6,480,035
- Issue date Nov 12, 2002
- Rambus, Inc.
- Kevin S. Donnelly
- G01 - MEASURING TESTING
Information Patent Grant
Phase detector with minimized phase detection error
- Patent number 6,340,900
- Issue date Jan 22, 2002
- Rambus, Inc.
- Kevin S. Donnelly
- G01 - MEASURING TESTING
Information Patent Grant
System for adjusting slew rate on an output of a drive circuit by e...
- Patent number 6,047,346
- Issue date Apr 4, 2000
- Rambus Inc.
- Benedict C. Lau
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Delay-locked loop
- Patent number 5,614,855
- Issue date Mar 25, 1997
- Rambus, Inc.
- Thomas H. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Amplifier with active duty cycle correction
- Patent number 5,572,158
- Issue date Nov 5, 1996
- Rambus, Inc.
- Thomas H. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Voltage controlled phase shifter with unlimited range
- Patent number 5,554,945
- Issue date Sep 10, 1996
- Rambus, Inc.
- Thomas H. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
FLASH MEMORY CONTROLLER WITH CALIBRATED DATA COMMUNICATION
- Publication number 20180095916
- Publication date Apr 5, 2018
- RAMBUS INC.
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLASH MEMORY CONTROLLER WITH CALIBRATED DATA COMMUNICATION
- Publication number 20170031854
- Publication date Feb 2, 2017
- RAMBUS INC.
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLASH MEMORY CONTROLLER WITH CALIBRATED DATA COMMUNICATION
- Publication number 20160011973
- Publication date Jan 14, 2016
- RAMBUS INC.
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory System with Calibrated Data Communication
- Publication number 20150169478
- Publication date Jun 18, 2015
- RAMBUS INC.
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory System with Calibrated Data Communication
- Publication number 20140229667
- Publication date Aug 14, 2014
- RAMBUS INC.
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory System with Calibrated Data Communication
- Publication number 20120204054
- Publication date Aug 9, 2012
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory System with Calibrated Data Communication
- Publication number 20090327789
- Publication date Dec 31, 2009
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Calibrated data communication system and method
- Publication number 20060120409
- Publication date Jun 8, 2006
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated circuit with timing adjustment mechanism and method
- Publication number 20040098634
- Publication date May 20, 2004
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Calibrated data communication system and method
- Publication number 20040076192
- Publication date Apr 22, 2004
- Rambus Inc.
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Phase detector with minimized phase detection error
- Publication number 20030016057
- Publication date Jan 23, 2003
- Kevin S. Donnelly
- H03 - BASIC ELECTRONIC CIRCUITRY

Tsyr-Chyang Ho

Person

Patents Grantslast 30 patents

Flash memory controller with calibrated data communication

Memory controller that calibrates a transmit timing offset

Flash memory controller with calibrated data communication

Memory system with calibrated data communication

Memory controller with circuitry to set memory device-specific refe...

Memory system with calibrated data communication

Memory system with calibrated data communication

Calibrated data communication system and method

Calibrated data communication system and method

Integrated circuit with timing adjustment mechanism and method

Phase detector with minimized phase detection error

Bus system optimization

Phase detector with minimized phase detection error

Phase detector with minimized phase detection error

System for adjusting slew rate on an output of a drive circuit by e...

Delay-locked loop

Amplifier with active duty cycle correction

Voltage controlled phase shifter with unlimited range

Patents Applicationslast 30 patents

FLASH MEMORY CONTROLLER WITH CALIBRATED DATA COMMUNICATION

FLASH MEMORY CONTROLLER WITH CALIBRATED DATA COMMUNICATION

FLASH MEMORY CONTROLLER WITH CALIBRATED DATA COMMUNICATION

Memory System with Calibrated Data Communication

Memory System with Calibrated Data Communication

Memory System with Calibrated Data Communication

Memory System with Calibrated Data Communication

Calibrated data communication system and method

Integrated circuit with timing adjustment mechanism and method

Calibrated data communication system and method

Phase detector with minimized phase detection error