Tzong-Sheng Chang

Person

Hsin-Chu, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Method of fabricating reticle
- Patent number 11,940,737
- Issue date Mar 26, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd
- Hsueh-Yi Chung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure with data storage structure and method for...
- Patent number 11,653,503
- Issue date May 16, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd
- Woan-Yun Hsiao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming interconnect structure
- Patent number 11,011,419
- Issue date May 18, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Bor-Zen Tien
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating reticle
- Patent number 11,003,091
- Issue date May 11, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd
- Hsueh-Yi Chung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for manufacturing semiconductor arrangements using photores...
- Patent number 10,957,653
- Issue date Mar 23, 2021
- Taiwan Semiconductor Manufacturing Company Limited
- Tsung-Yu Chiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure with data storage structure
- Patent number 10,763,305
- Issue date Sep 1, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Woan-Yun Hsiao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming interconnect structure
- Patent number 10,629,481
- Issue date Apr 21, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Bor-Zen Tien
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating reticle
- Patent number 10,534,272
- Issue date Jan 14, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd
- Hsueh-Yi Chung
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Back-end-of-line (BEOL) arrangement with multi-height interlayer di...
- Patent number 10,515,902
- Issue date Dec 24, 2019
- Taiwan Semiconductor Manufacturing Company Limited
- Tsung-Yu Chiang
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method of manufacturing a semiconductor structure including a plura...
- Patent number 10,090,360
- Issue date Oct 2, 2018
- Taiwan Semiconductor Manufacturing Co., Ltd
- Woan-Yun Hsiao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Exposure method of wafer substrate, manufacturing method of semicon...
- Patent number 10,073,354
- Issue date Sep 11, 2018
- Taiwan Semiconductor Manufacturing Co., Ltd
- Hsueh-Yi Chung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor arrangement having an overlay alignment mark with a h...
- Patent number 9,870,998
- Issue date Jan 16, 2018
- Taiwan Semiconductor Manufacturing Company Limited
- Tsung-Yu Chiang
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method for forming semiconductor device structure
- Patent number 9,831,130
- Issue date Nov 28, 2017
- Taiwan Semiconductor Manufacturing Co., Ltd
- An-Lun Lo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming interconnect structure
- Patent number 9,716,034
- Issue date Jul 25, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Bor-Zen Tien
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device structure and method for forming the same
- Patent number 9,679,818
- Issue date Jun 13, 2017
- Taiwan Semiconductor Manufacturing Co., Ltd
- An-Lun Lo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods and apparatus of metal gate transistors
- Patent number 9,508,590
- Issue date Nov 29, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tsung-Yu Chiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods and apparatus of metal gate transistors
- Patent number 9,252,259
- Issue date Feb 2, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tsung-Yu Chiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming interconnect structure
- Patent number 9,190,319
- Issue date Nov 17, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsuan-Han Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for forming a semiconductor arrangement with structures hav...
- Patent number 9,178,066
- Issue date Nov 3, 2015
- Taiwan Semiconductor Manufacturing Company Limited
- Tsung-Yu Chiang
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Apparatus and method for designing an integrated circuit layout hav...
- Patent number 9,122,828
- Issue date Sep 1, 2015
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Tsung-Yu Chiang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device having a spacer and a liner overlying a sidewa...
- Patent number 8,860,151
- Issue date Oct 14, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Sheng-Ching Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reacted layer for improving thickness uniformity of strained struct...
- Patent number 8,741,726
- Issue date Jun 3, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Cheng-Te Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to reduce leakage in a protection diode structure
- Patent number 7,998,772
- Issue date Aug 16, 2011
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Bor-Zen Tien
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with reduced leakage protection diode
- Patent number 7,663,164
- Issue date Feb 16, 2010
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Bor-Zen Tien
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bond pad scheme for Cu process
- Patent number 7,015,129
- Issue date Mar 21, 2006
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Hung Lai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bond pad scheme for Cu process
- Patent number 6,844,626
- Issue date Jan 18, 2005
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Hung Lai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming and etching a resist protect oxide layer includin...
- Patent number 6,348,389
- Issue date Feb 19, 2002
- Taiwan Semiconductor Manufacturing Company
- Chen Cheng Chou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-distort spacer profile during subsequent processing
- Patent number 6,346,449
- Issue date Feb 12, 2002
- Taiwan Semiconductor Manufacturing Company
- Tzong-Sheng Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to improve TiSix salicide formation
- Patent number 6,294,448
- Issue date Sep 25, 2001
- Taiwan Semiconductor Manufacturing Company
- Tzong-Sheng Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for salicide process using a titanium nitride barrier layer
- Patent number 6,284,611
- Issue date Sep 4, 2001
- Taiwan Semiconductor Manufacturing Company
- Bor-Zen Tien
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD OF FABRICATING RETICLE
- Publication number 20210263425
- Publication date Aug 26, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Hsueh-Yi CHUNG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE WITH DATA STORAGE STRUCTURE AND METHOD FOR...
- Publication number 20200395411
- Publication date Dec 17, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Woan-Yun HSIAO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Forming Interconnect Structure
- Publication number 20200227316
- Publication date Jul 16, 2020
- Taiwan Semiconductor Manufacturing Company Ltd.
- Bor-Zen Tien
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FABRICATING RETICLE
- Publication number 20200150546
- Publication date May 14, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Hsueh-Yi CHUNG
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
MULTI-HEIGHT SEMICONDUCTOR STRUCTURES
- Publication number 20200043859
- Publication date Feb 6, 2020
- Taiwan Semiconductor Manufacturing Company Limited
- Tsung-Yu CHIANG
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
SEMICONDUCTOR STRUCTURE WITH DATA STORAGE STRUCTURE AND METHOD FOR...
- Publication number 20190035850
- Publication date Jan 31, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Woan-Yun HSIAO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FABRICATING RETICLE
- Publication number 20190004436
- Publication date Jan 3, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Hsueh-Yi CHUNG
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
MULTI-HEIGHT SEMICONDUCTOR STRUCTURES
- Publication number 20180138129
- Publication date May 17, 2018
- Taiwan Semiconductor Manufacturing Company Limited
- Tsung-Yu CHIANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Forming Interconnect Structure
- Publication number 20170323827
- Publication date Nov 9, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Bor-Zen Tien
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING SEMICONDUCTOR DEVICE STRUCTURE
- Publication number 20170278756
- Publication date Sep 28, 2017
- Taiwan Semiconductor Manufacturing Co., Ltd.
- An-Lun LO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE WITH DATA STORAGE STRUCTURE AND METHOD FOR...
- Publication number 20160240775
- Publication date Aug 18, 2016
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Woan-Yun HSIAO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods and Apparatus of Metal Gate Transistors
- Publication number 20160133509
- Publication date May 12, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tsung-Yu Chiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EXPOSURE METHOD OF WAFER SUBSTRATE, MANUFACTURING METHOD OF SEMICON...
- Publication number 20160124323
- Publication date May 5, 2016
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Hsueh-Yi CHUNG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME
- Publication number 20160126309
- Publication date May 5, 2016
- Taiwan Semiconductor Manufacturing Co., LTD
- An-Lun LO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Forming Interconnect Structure
- Publication number 20160042992
- Publication date Feb 11, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Bor-Zen Tien
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-HEIGHT SEMICONDUCTOR STRUCTURES
- Publication number 20160043038
- Publication date Feb 11, 2016
- Taiwan Semiconductor Manufacturing Company Limited
- Tsung-Yu Chiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-HEIGHT SEMICONDUCTOR STRUCTURES
- Publication number 20150061016
- Publication date Mar 5, 2015
- Taiwan Semiconductor Manufacturing Company Limited
- Tsung-Yu Chiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS AND METHOD FOR DESIGNING AN INTEGRATED CIRCUIT LAYOUT HA...
- Publication number 20140344770
- Publication date Nov 20, 2014
- Taiwan Semiconductor Manufacturing Co., LTD
- Tsung-Yu CHIANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method For Forming Interconnect Structure
- Publication number 20140252621
- Publication date Sep 11, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsuan-Han Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE HAVING A SPACER AND A LINER OVERLYING A SIDEWA...
- Publication number 20140246709
- Publication date Sep 4, 2014
- Sheng-Ching Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods and Apparatus of Metal Gate Transistors
- Publication number 20140231932
- Publication date Aug 21, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tsung-Yu Chiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REACTED LAYER FOR IMPROVING THICKNESS UNIFORMITY OF STRAINED STRUCT...
- Publication number 20130143391
- Publication date Jun 6, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Cheng-Te LIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to reduce leakage in a protection diode structure
- Publication number 20100081249
- Publication date Apr 1, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Bor-Zen Tien
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Film treatment method preventing blocked etch of low-K dielectrics
- Publication number 20060205232
- Publication date Sep 14, 2006
- Lih-Ping Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to reduce leakage in a protection diode structure
- Publication number 20060163657
- Publication date Jul 27, 2006
- Bor-Zen Tien
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Bond pad scheme for Cu process
- Publication number 20050095836
- Publication date May 5, 2005
- Chia-Hung Lai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BOND PAD SCHEME FOR CU PROCESS
- Publication number 20040235223
- Publication date Nov 25, 2004
- Chia-Hung Lai
- H01 - BASIC ELECTRIC ELEMENTS

Tzong-Sheng Chang

Person

Patents Grantslast 30 patents

Method of fabricating reticle

Semiconductor structure with data storage structure and method for...

Method for forming interconnect structure

Method of fabricating reticle

Methods for manufacturing semiconductor arrangements using photores...

Semiconductor structure with data storage structure

Method for forming interconnect structure

Method of fabricating reticle

Back-end-of-line (BEOL) arrangement with multi-height interlayer di...

Method of manufacturing a semiconductor structure including a plura...

Exposure method of wafer substrate, manufacturing method of semicon...

Semiconductor arrangement having an overlay alignment mark with a h...

Method for forming semiconductor device structure

Method for forming interconnect structure

Semiconductor device structure and method for forming the same

Methods and apparatus of metal gate transistors

Methods and apparatus of metal gate transistors

Method for forming interconnect structure

Methods for forming a semiconductor arrangement with structures hav...

Apparatus and method for designing an integrated circuit layout hav...

Semiconductor device having a spacer and a liner overlying a sidewa...

Reacted layer for improving thickness uniformity of strained struct...

Method to reduce leakage in a protection diode structure

Semiconductor device with reduced leakage protection diode

Bond pad scheme for Cu process

Bond pad scheme for Cu process

Method of forming and etching a resist protect oxide layer includin...

Non-distort spacer profile during subsequent processing

Method to improve TiSix salicide formation

Method for salicide process using a titanium nitride barrier layer

Patents Applicationslast 30 patents

METHOD OF FABRICATING RETICLE

SEMICONDUCTOR STRUCTURE WITH DATA STORAGE STRUCTURE AND METHOD FOR...

Method for Forming Interconnect Structure

METHOD OF FABRICATING RETICLE

MULTI-HEIGHT SEMICONDUCTOR STRUCTURES

SEMICONDUCTOR STRUCTURE WITH DATA STORAGE STRUCTURE AND METHOD FOR...

METHOD OF FABRICATING RETICLE

MULTI-HEIGHT SEMICONDUCTOR STRUCTURES

Method for Forming Interconnect Structure

METHOD FOR FORMING SEMICONDUCTOR DEVICE STRUCTURE

SEMICONDUCTOR STRUCTURE WITH DATA STORAGE STRUCTURE AND METHOD FOR...

Methods and Apparatus of Metal Gate Transistors

EXPOSURE METHOD OF WAFER SUBSTRATE, MANUFACTURING METHOD OF SEMICON...

SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME

Method for Forming Interconnect Structure

MULTI-HEIGHT SEMICONDUCTOR STRUCTURES

MULTI-HEIGHT SEMICONDUCTOR STRUCTURES

APPARATUS AND METHOD FOR DESIGNING AN INTEGRATED CIRCUIT LAYOUT HA...

Method For Forming Interconnect Structure

SEMICONDUCTOR DEVICE HAVING A SPACER AND A LINER OVERLYING A SIDEWA...

Methods and Apparatus of Metal Gate Transistors

REACTED LAYER FOR IMPROVING THICKNESS UNIFORMITY OF STRAINED STRUCT...

Method to reduce leakage in a protection diode structure

Film treatment method preventing blocked etch of low-K dielectrics

Method to reduce leakage in a protection diode structure

Bond pad scheme for Cu process

BOND PAD SCHEME FOR CU PROCESS