Udo Hartmann

Person

Munchen, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Method for testing semiconductor chips by means of bit masks
- Patent number 7,461,308
- Issue date Dec 2, 2008
- Infineon Technologies AG
- Jochen Kallscheuer
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory having a circuit for testing the operation of the...
- Patent number 7,454,662
- Issue date Nov 18, 2008
- Infineon Technologies AG
- Udo Hartmann
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for testing semiconductor chips using register sets
- Patent number 7,454,676
- Issue date Nov 18, 2008
- Infineon Technologies AG
- Udo Hartmann
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory component and method for testing semiconductor...
- Patent number 7,382,669
- Issue date Jun 3, 2008
- Infineon Technologies AG
- Udo Hartmann
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory component and method for testing semiconductor...
- Patent number 7,355,911
- Issue date Apr 8, 2008
- Infineon Technologies AG
- Udo Hartmann
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for internally trimming output drivers and ter...
- Patent number 7,124,325
- Issue date Oct 17, 2006
- Infineon Technologies AG
- Udo Hartmann
- G11 - INFORMATION STORAGE
Information Patent Grant
Test arrangement for testing semiconductor circuit chips
- Patent number 7,088,122
- Issue date Aug 8, 2006
- Infineon Technologies AG
- Udo Hartmann
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit and method for testing a data memory
- Patent number 6,968,483
- Issue date Nov 22, 2005
- Infineon Technologies AG
- Udo Hartmann
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for the parallel and independent testing of vo...
- Patent number 6,903,565
- Issue date Jun 7, 2005
- Infineon Technologies AG
- Udo Hartmann
- G01 - MEASURING TESTING
Information Patent Grant
Method for testing semiconductor chips
- Patent number 6,858,447
- Issue date Feb 22, 2005
- Infineon Technologies AG
- Udo Hartmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configuration for testing semiconductor devices
- Patent number 6,836,137
- Issue date Dec 28, 2004
- Infineon Technologies AG
- Udo Hartmann
- G01 - MEASURING TESTING
Information Patent Grant
Test system for conducting a function test of a semiconductor eleme...
- Patent number 6,774,649
- Issue date Aug 10, 2004
- Infineon Technologies AG
- Udo Hartmann
- G01 - MEASURING TESTING
Information Patent Grant
Device and method for calibrating the pulse duration of a signal so...
- Patent number 6,756,699
- Issue date Jun 29, 2004
- Infineon Technologies AG
- Udo Hartmann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus for testing semiconductor devices
- Patent number 6,750,671
- Issue date Jun 15, 2004
- Infineon Technologies AG
- Udo Hartmann
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated semiconductor memory having memory cells in a plurality...
- Patent number 6,650,577
- Issue date Nov 18, 2003
- Infineon Technologies AG
- Udo Hartmann
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory having memory cells with magnetoresistive memory...
- Patent number 6,442,063
- Issue date Aug 27, 2002
- Infineon Technologies AG
- Udo Hartmann
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Modular Integrated Underground Utilities Enclosure and Distribution...
- Publication number 20130055650
- Publication date Mar 7, 2013
- Udo Hartmann
- E03 - WATER SUPPLY SEWERAGE
Information Patent Application
SEMICONDUCTOR TEST DEVICE
- Publication number 20090079450
- Publication date Mar 26, 2009
- QIMONDA AG
- Udo Hartmann
- G01 - MEASURING TESTING
Information Patent Application
TEST DEVICE FOR SEMICONDUCTOR DEVICES
- Publication number 20080238462
- Publication date Oct 2, 2008
- QIMONDA AG
- Udo Hartmann
- G01 - MEASURING TESTING
Information Patent Application
DEVICE AND METHOD FOR ELECTRICAL CONTACTING FOR TESTING SEMICONDUCT...
- Publication number 20080231293
- Publication date Sep 25, 2008
- QIMONDA AG
- Udo Hartmann
- G01 - MEASURING TESTING
Information Patent Application
SEMICONDUCTOR DEVICE AND TRIMMING METHOD
- Publication number 20080129371
- Publication date Jun 5, 2008
- QIMONDA AG
- Udo Hartmann
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR COMPENSATION FOR A POSITION CHANGE OF A PROBE CARD
- Publication number 20070262782
- Publication date Nov 15, 2007
- QIMONDA AG
- Udo Hartmann
- G01 - MEASURING TESTING
Information Patent Application
Semiconductor memory component and method for testing semiconductor...
- Publication number 20070011510
- Publication date Jan 11, 2007
- Udo Hartmann
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory component and method for testing semiconductor...
- Publication number 20060250864
- Publication date Nov 9, 2006
- Udo Hartmann
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory component and method for testing semiconductor...
- Publication number 20060236163
- Publication date Oct 19, 2006
- Udo Hartmann
- G11 - INFORMATION STORAGE
Information Patent Application
Method for testing semiconductor chips using check bits
- Publication number 20060156108
- Publication date Jul 13, 2006
- Patric Stracke
- G01 - MEASURING TESTING
Information Patent Application
Method for testing semiconductor chips by means of bit masks
- Publication number 20060156107
- Publication date Jul 13, 2006
- Jochen Kallscheuer
- G01 - MEASURING TESTING
Information Patent Application
Method for testing semiconductor chips using register sets
- Publication number 20060156110
- Publication date Jul 13, 2006
- Udo Hartmann
- G11 - INFORMATION STORAGE
Information Patent Application
Test arrangement for testing semiconductor circuit chips
- Publication number 20050068055
- Publication date Mar 31, 2005
- Udo Hartmann
- G01 - MEASURING TESTING
Information Patent Application
Integrated memory having a circuit for testing the operation of the...
- Publication number 20050039073
- Publication date Feb 17, 2005
- Udo Hartmann
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for internally trimming output drivers and ter...
- Publication number 20040066683
- Publication date Apr 8, 2004
- Udo Hartmann
- G11 - INFORMATION STORAGE
Information Patent Application
Configuration for testing semiconductor devices
- Publication number 20040027891
- Publication date Feb 12, 2004
- Udo Hartmann
- G01 - MEASURING TESTING
Information Patent Application
Apparatus and method for the parallel and independent testing of vo...
- Publication number 20030141890
- Publication date Jul 31, 2003
- Udo Hartmann
- G01 - MEASURING TESTING
Information Patent Application
Method for testing semiconductor chips
- Publication number 20030059962
- Publication date Mar 27, 2003
- Udo Hartmann
- G01 - MEASURING TESTING
Information Patent Application
Device and method for calibrating the pulse duration of a signal so...
- Publication number 20030016064
- Publication date Jan 23, 2003
- Udo Hartmann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Test system for conducting a function test of a semiconductor eleme...
- Publication number 20020109524
- Publication date Aug 15, 2002
- Udo Hartmann
- G01 - MEASURING TESTING
Information Patent Application
Method and integrated circuit for testing a memory having a number...
- Publication number 20020073367
- Publication date Jun 13, 2002
- Udo Hartmann
- G11 - INFORMATION STORAGE
Information Patent Application
Circuit and method for testing a data memory
- Publication number 20020056062
- Publication date May 9, 2002
- Udo Hartmann
- G11 - INFORMATION STORAGE
Information Patent Application
Apparatus for testing semiconductor devices
- Publication number 20020021141
- Publication date Feb 21, 2002
- Udo Hartmann
- G01 - MEASURING TESTING
Information Patent Application
Integrated memory having memory cells with a magnetoresistive stora...
- Publication number 20020018360
- Publication date Feb 14, 2002
- Udo Hartmann
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated semiconductor memory having memory cells in a plurality...
- Publication number 20020009003
- Publication date Jan 24, 2002
- Udo Hartmann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated memory having memory cells with magnetoresistive memory...
- Publication number 20020003727
- Publication date Jan 10, 2002
- Udo Hartmann
- G11 - INFORMATION STORAGE

Udo Hartmann

Person

Patents Grantslast 30 patents

Method for testing semiconductor chips by means of bit masks

Integrated memory having a circuit for testing the operation of the...

Method for testing semiconductor chips using register sets

Semiconductor memory component and method for testing semiconductor...

Semiconductor memory component and method for testing semiconductor...

Method and apparatus for internally trimming output drivers and ter...

Test arrangement for testing semiconductor circuit chips

Circuit and method for testing a data memory

Apparatus and method for the parallel and independent testing of vo...

Method for testing semiconductor chips

Configuration for testing semiconductor devices

Test system for conducting a function test of a semiconductor eleme...

Device and method for calibrating the pulse duration of a signal so...

Apparatus for testing semiconductor devices

Integrated semiconductor memory having memory cells in a plurality...

Integrated memory having memory cells with magnetoresistive memory...

Patents Applicationslast 30 patents

Modular Integrated Underground Utilities Enclosure and Distribution...

SEMICONDUCTOR TEST DEVICE

TEST DEVICE FOR SEMICONDUCTOR DEVICES

DEVICE AND METHOD FOR ELECTRICAL CONTACTING FOR TESTING SEMICONDUCT...

SEMICONDUCTOR DEVICE AND TRIMMING METHOD

METHOD FOR COMPENSATION FOR A POSITION CHANGE OF A PROBE CARD

Semiconductor memory component and method for testing semiconductor...

Semiconductor memory component and method for testing semiconductor...

Semiconductor memory component and method for testing semiconductor...

Method for testing semiconductor chips using check bits

Method for testing semiconductor chips by means of bit masks

Method for testing semiconductor chips using register sets

Test arrangement for testing semiconductor circuit chips

Integrated memory having a circuit for testing the operation of the...

Method and apparatus for internally trimming output drivers and ter...

Configuration for testing semiconductor devices

Apparatus and method for the parallel and independent testing of vo...

Method for testing semiconductor chips

Device and method for calibrating the pulse duration of a signal so...

Test system for conducting a function test of a semiconductor eleme...

Method and integrated circuit for testing a memory having a number...

Circuit and method for testing a data memory

Apparatus for testing semiconductor devices

Integrated memory having memory cells with a magnetoresistive stora...

Integrated semiconductor memory having memory cells in a plurality...

Integrated memory having memory cells with magnetoresistive memory...