Uk Rae Cho

Person

Suwon-si, KR

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor devices
- Patent number 11,437,320
- Issue date Sep 6, 2022
- Samsung Electronics Co., Ltd.
- Suk Youn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method for operating the same
- Patent number 9,537,470
- Issue date Jan 3, 2017
- Samsung Electronics Co., Ltd.
- Chung-Hee Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor device and method of fabricating the same
- Patent number 9,318,607
- Issue date Apr 19, 2016
- Samsung Electronics Co., Ltd.
- Jae-Woo Seo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method for operating the same
- Patent number 9,130,550
- Issue date Sep 8, 2015
- Samsung Electronics Co., Ltd.
- Chung-Hee Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Delay test device and system-on-chip having the same
- Patent number 8,578,227
- Issue date Nov 5, 2013
- Samsung Electronics Co., Ltd.
- Young-Jae Son
- G01 - MEASURING TESTING
Information Patent Grant
Flip-flop and semiconductor device including the same
- Patent number 8,531,208
- Issue date Sep 10, 2013
- Samsung Electronics Co., Ltd.
- Gun Ok Jung
- G01 - MEASURING TESTING
Information Patent Grant
Stacked memory cell for use in high-density CMOS SRAM
- Patent number 7,924,604
- Issue date Apr 12, 2011
- Samsung Electronics Co., Ltd.
- Hyang-Ja Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Delay-locked loop circuits and method for generating transmission c...
- Patent number 7,825,710
- Issue date Nov 2, 2010
- Samsung Electronics Co., Ltd.
- Nam-Seog Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Data line layout and line driving method in semiconductor memory de...
- Patent number 7,697,314
- Issue date Apr 13, 2010
- Samsung Electronics Co., Ltd.
- Nam-Seog Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device with hierarchical bit line structure
- Patent number 7,656,723
- Issue date Feb 2, 2010
- Samsung Electronics Co., Ltd.
- Nam-Seog Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device with hierarchical bit line structure
- Patent number 7,616,512
- Issue date Nov 10, 2009
- Samsung Electronics Co., Ltd.
- Nam-Seog Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Phase interpolation circuit and method of generating phase interpol...
- Patent number 7,551,013
- Issue date Jun 23, 2009
- Samsung Electronics Co., Ltd.
- Nam-Seog Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Impedance control circuit in semiconductor device and impedance con...
- Patent number 7,548,086
- Issue date Jun 16, 2009
- Samsung Electronics Co., Ltd.
- Tae-Hyoung Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Layout structure of MOS transistors on an active region
- Patent number 7,525,173
- Issue date Apr 28, 2009
- Samsung Electronics, Ltd.
- Hyang-Ja Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor memory device with hierarchical bit line structure
- Patent number 7,489,570
- Issue date Feb 10, 2009
- Samsung Electronics Co., Ltd.
- Nam-Seog Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Output impedance circuit and output buffer circuit including the same
- Patent number 7,471,109
- Issue date Dec 30, 2008
- Samsung Electronics Company, Ltd.
- Tae-Hyoung Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor memory device testable with a single data rate and/or...
- Patent number 7,454,672
- Issue date Nov 18, 2008
- Samsung Electronics Co., Ltd.
- Jong-Cheol Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Amplifier circuit having constant output swing range and stable del...
- Patent number 7,400,177
- Issue date Jul 15, 2008
- Samsung Electronics Co., Ltd.
- Nam-Seog Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Impedance controllable ouput drive circuit in semiconductor device...
- Patent number 7,385,414
- Issue date Jun 10, 2008
- Samsung Electronics Co., Ltd.
- Tae-Hyoung Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Integrated circuit chips and wafers including on-chip test element...
- Patent number 7,307,441
- Issue date Dec 11, 2007
- Samsung Electronics Co., Ltd.
- Kwon-il Sohn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and circuit for writing double data rate (DDR) sampled data...
- Patent number 7,295,489
- Issue date Nov 13, 2007
- Samsung Electronics Co., Ltd.
- Yong-Jin Yoon
- G11 - INFORMATION STORAGE
Information Patent Grant
Content addressable memory device
- Patent number 7,274,580
- Issue date Sep 25, 2007
- Samsung Electronics Co., Ltd.
- Tae-gyoung Kang
- G11 - INFORMATION STORAGE
Information Patent Grant
Amplifier circuit having constant output swing range and stable del...
- Patent number 7,187,214
- Issue date Mar 6, 2007
- Samsung Electronics Co., Ltd.
- Nam-Seog Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Impedance controller and impedance control method
- Patent number 7,170,318
- Issue date Jan 30, 2007
- Samsung Electronics Co., Ltd.
- Tae-Hyoung Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Apparatus for generating internal clock signal
- Patent number 7,154,312
- Issue date Dec 26, 2006
- Samsung Electronics Co., Ltd.
- Nam-Seog Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor memory device capable of generating variable clock si...
- Patent number 7,016,257
- Issue date Mar 21, 2006
- Samsung Electronics Co., Ltd.
- Nam-Seog Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Content addressable memory device
- Patent number 7,002,822
- Issue date Feb 21, 2006
- Samsung Electronics Co., Ltd.
- Tae-gyoung Kang
- G11 - INFORMATION STORAGE
Information Patent Grant
Synchronous mirror delay circuit and semiconductor integrated circu...
- Patent number 6,992,514
- Issue date Jan 31, 2006
- Samsung Electronics Co., Ltd.
- Nam-Seog Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor device with impedance control circuit
- Patent number 6,947,336
- Issue date Sep 20, 2005
- Samsung Electronics, Co., LTD
- Tae-Hyoung Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit with on-chip termination
- Patent number 6,930,508
- Issue date Aug 16, 2005
- Samsung Electronics Co., LTD
- Nam-Seog Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR DEVICES
- Publication number 20210028109
- Publication date Jan 28, 2021
- Samsung Electronics Co., Ltd.
- Suk Youn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD FOR OPERATING THE SAME
- Publication number 20150349756
- Publication date Dec 3, 2015
- Samsung Electronics Co., Ltd.
- Chung-Hee KIM
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
- Publication number 20150014775
- Publication date Jan 15, 2015
- Jae-Woo SEO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD FOR OPERATING THE SAME
- Publication number 20140368246
- Publication date Dec 18, 2014
- Samsung Electronics Co., Ltd.
- Chung-Hee KIM
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SEMICONDUCTOR CIRCUIT AND METHOD FOR OPERATING THE SAME
- Publication number 20140184288
- Publication date Jul 3, 2014
- Samsung Electronics Co., Ltd.
- Chung-Hee KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLIP-FLOP AND SEMICONDUCTOR DEVICE INCLUDING THE SAME
- Publication number 20120223739
- Publication date Sep 6, 2012
- Gun Ok JUNG
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TEST DEVICE AND SYSTEM-ON-CHIP HAVING THE SAME
- Publication number 20110154142
- Publication date Jun 23, 2011
- Young-Jae SON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE WITH HIERARCHICAL BIT LINE STRUCTURE
- Publication number 20090154265
- Publication date Jun 18, 2009
- Samsung Electronics Co., Ltd.
- Nam-Seog KIM
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE WITH HIERARCHICAL BIT LINE STRUCTURE
- Publication number 20090154213
- Publication date Jun 18, 2009
- Samsung Electronics Co., Ltd.
- Nam-Seog KIM
- G11 - INFORMATION STORAGE
Information Patent Application
Dual mirror chips, wafer including the dual mirror chips, multi-chi...
- Publication number 20090008799
- Publication date Jan 8, 2009
- SAMSUNG ELECTRONICS CO., LTD.
- Byong-Kwon Lee
- G01 - MEASURING TESTING
Information Patent Application
Data line layout and line driving method in semiconductor memory de...
- Publication number 20080165559
- Publication date Jul 10, 2008
- Samsung Electronics Co., Ltd.
- Nam-Seog Kim
- G11 - INFORMATION STORAGE
Information Patent Application
Stacked memory cell for use in high-density CMOS SRAM
- Publication number 20070147107
- Publication date Jun 28, 2007
- Hyang-Ja Yang
- G11 - INFORMATION STORAGE
Information Patent Application
AMPLIFIER CIRCUIT HAVING CONSTANT OUTPUT SWING RANGE AND STABLE DEL...
- Publication number 20070139084
- Publication date Jun 21, 2007
- Nam-Seog KIM
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Semiconductor memory device with hierarchical bit line structure
- Publication number 20070115710
- Publication date May 24, 2007
- Nam-Seog Kim
- G11 - INFORMATION STORAGE
Information Patent Application
Layout structure of MOS transistors and methods of disposing MOS tr...
- Publication number 20070020858
- Publication date Jan 25, 2007
- SAMSUNG ELECTRONICS CO., LTD.
- Hyang-Ja Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Impedance control circuit in semiconductor device and impedance con...
- Publication number 20060261844
- Publication date Nov 23, 2006
- SAMSUNG ELECTRONICS CO., LTD.
- Tae-Hyoung Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Phase interpolation circuit and method of generating phase interpol...
- Publication number 20060256205
- Publication date Nov 16, 2006
- SAMSUNG ELECTRONICS CO., LTD.
- Nam-Seog Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Output impedance circuit and output buffer circuit including the same
- Publication number 20060250156
- Publication date Nov 9, 2006
- Tae-Hyoung Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Impedance controllable output drive circuit in semiconductor device...
- Publication number 20060250157
- Publication date Nov 9, 2006
- Samsung Electronics Co., Ltd.
- Tae-Hyoung Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Delay-locked loop circuits and method for generating transmission c...
- Publication number 20060238227
- Publication date Oct 26, 2006
- SAMSUNG ELECTRONICS CO., LTD.
- Nam-Seog Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Content addressable memory device
- Publication number 20060062038
- Publication date Mar 23, 2006
- SAMSUNG ELECTRONICS CO., LTD.
- Tae-Gyoung Kang
- G11 - INFORMATION STORAGE
Information Patent Application
Content addressable memory (CAM) cell for operating at a high speed
- Publication number 20050201132
- Publication date Sep 15, 2005
- SAMSUNG ELECTRONICS CO., LTD.
- Ho-Geun Shin
- G11 - INFORMATION STORAGE
Information Patent Application
Amplifier circuit having constant output swing range and stable del...
- Publication number 20050194995
- Publication date Sep 8, 2005
- SAMSUNG ELECTRONICS CO., LTD.
- Nam-Seog Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and circuit for writing double data rate (DDR) sampled data...
- Publication number 20050157827
- Publication date Jul 21, 2005
- SAMSUNG ELECTRONICS CO., LTD.
- Yong-Jin Yoon
- G11 - INFORMATION STORAGE
Information Patent Application
Impedance controller and impedance control method
- Publication number 20050146350
- Publication date Jul 7, 2005
- Tae-Hyoung Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Apparatus for generating internal clock signal
- Publication number 20050146365
- Publication date Jul 7, 2005
- SAMSUNG ELECTRONICS CO., LTD.
- Nam-Seog Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Content addressable memory device
- Publication number 20050024976
- Publication date Feb 3, 2005
- SAMSUNG ELECTRONICS CO., LTD.
- Tae-Gyoung Kang
- G11 - INFORMATION STORAGE
Information Patent Application
Synchronous mirror delay circuit and semiconductor integrated circu...
- Publication number 20040178836
- Publication date Sep 16, 2004
- SAMSUNG ELECTRONICS CO., LTD.
- Nam-Seog Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Semiconductor memory device capable of generating variable clock si...
- Publication number 20040179421
- Publication date Sep 16, 2004
- SAMSUNG ELECTRONICS CO., LTD.
- Nam-Soeg Kim
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device testable with a single data rate and/or...
- Publication number 20040151039
- Publication date Aug 5, 2004
- SAMSUNG ELECTRONICS CO., LTD.
- Jong-Cheol Lee
- G11 - INFORMATION STORAGE

Person

Patents Grantslast 30 patents

Semiconductor devices

Semiconductor device and method for operating the same

Semiconductor device and method of fabricating the same

Semiconductor device and method for operating the same

Delay test device and system-on-chip having the same

Flip-flop and semiconductor device including the same

Stacked memory cell for use in high-density CMOS SRAM

Delay-locked loop circuits and method for generating transmission c...

Data line layout and line driving method in semiconductor memory de...

Semiconductor memory device with hierarchical bit line structure

Semiconductor memory device with hierarchical bit line structure

Phase interpolation circuit and method of generating phase interpol...

Impedance control circuit in semiconductor device and impedance con...

Layout structure of MOS transistors on an active region

Semiconductor memory device with hierarchical bit line structure

Output impedance circuit and output buffer circuit including the same

Semiconductor memory device testable with a single data rate and/or...

Amplifier circuit having constant output swing range and stable del...

Impedance controllable ouput drive circuit in semiconductor device...

Integrated circuit chips and wafers including on-chip test element...

Method and circuit for writing double data rate (DDR) sampled data...

Content addressable memory device

Amplifier circuit having constant output swing range and stable del...

Impedance controller and impedance control method

Apparatus for generating internal clock signal

Semiconductor memory device capable of generating variable clock si...

Content addressable memory device

Synchronous mirror delay circuit and semiconductor integrated circu...

Semiconductor device with impedance control circuit

Integrated circuit with on-chip termination

Patents Applicationslast 30 patents

SEMICONDUCTOR DEVICES

SEMICONDUCTOR DEVICE AND METHOD FOR OPERATING THE SAME

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

SEMICONDUCTOR DEVICE AND METHOD FOR OPERATING THE SAME

SEMICONDUCTOR CIRCUIT AND METHOD FOR OPERATING THE SAME

FLIP-FLOP AND SEMICONDUCTOR DEVICE INCLUDING THE SAME

TEST DEVICE AND SYSTEM-ON-CHIP HAVING THE SAME

SEMICONDUCTOR MEMORY DEVICE WITH HIERARCHICAL BIT LINE STRUCTURE

SEMICONDUCTOR MEMORY DEVICE WITH HIERARCHICAL BIT LINE STRUCTURE

Dual mirror chips, wafer including the dual mirror chips, multi-chi...

Data line layout and line driving method in semiconductor memory de...

Stacked memory cell for use in high-density CMOS SRAM

AMPLIFIER CIRCUIT HAVING CONSTANT OUTPUT SWING RANGE AND STABLE DEL...

Semiconductor memory device with hierarchical bit line structure

Layout structure of MOS transistors and methods of disposing MOS tr...

Impedance control circuit in semiconductor device and impedance con...

Phase interpolation circuit and method of generating phase interpol...

Output impedance circuit and output buffer circuit including the same

Impedance controllable output drive circuit in semiconductor device...

Delay-locked loop circuits and method for generating transmission c...

Content addressable memory device

Content addressable memory (CAM) cell for operating at a high speed

Amplifier circuit having constant output swing range and stable del...

Method and circuit for writing double data rate (DDR) sampled data...

Impedance controller and impedance control method

Apparatus for generating internal clock signal

Content addressable memory device

Synchronous mirror delay circuit and semiconductor integrated circu...

Semiconductor memory device capable of generating variable clock si...

Semiconductor memory device testable with a single data rate and/or...