Ulrich Klostermann

Person

Zwiesel, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Predicting defect rate based on lithographic model parameters
- Patent number 11,914,306
- Issue date Feb 27, 2024
- Synopsys, Inc.
- Erik A. Verduijn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Stochastic-aware lithographic models for mask synthesis
- Patent number 11,900,042
- Issue date Feb 13, 2024
- Synopsys, Inc.
- Kevin Dean Lucas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Lithography improvement based on defect probability distributions a...
- Patent number 11,314,171
- Issue date Apr 26, 2022
- Synopsys, Inc.
- Lawrence S. Melvin
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Condensed memory cell structure using a FinFET
- Patent number 8,665,629
- Issue date Mar 4, 2014
- Qimonda AG
- Human Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MRAM device structure employing thermally-assisted write operations...
- Patent number 8,310,866
- Issue date Nov 13, 2012
- Qimonda AG
- Rainer Leuschner
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Integrated circuit including doped semiconductor line having conduc...
- Patent number 8,084,759
- Issue date Dec 27, 2011
- Qimonda AG
- Ulrich Klostermann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit
- Patent number 8,063,394
- Issue date Nov 22, 2011
- Qimonda AG
- Dieter Andres
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Integrated circuit having a magnetic tunnel junction device and method
- Patent number 7,902,616
- Issue date Mar 8, 2011
- Qimonda AG
- Ulrich Klostermann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Magnetoresistive memory cell
- Patent number 7,903,452
- Issue date Mar 8, 2011
- Qimonda AG
- Rok Dittrich
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit, memory cell array, memory module, and method of...
- Patent number 7,903,454
- Issue date Mar 8, 2011
- Qimonda AG
- Dietmar Gogl
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit, memory module, and method of manufacturing an i...
- Patent number 7,893,511
- Issue date Feb 22, 2011
- Qimonda AG
- Manfred Ruehrig
- G11 - INFORMATION STORAGE
Information Patent Grant
Magnetoresistive sensor with tunnel barrier and method
- Patent number 7,863,700
- Issue date Jan 4, 2011
- Qimonda AG
- Franz Kreupl
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Integrated circuit, method of manufacturing an integrated circuit,...
- Patent number 7,855,435
- Issue date Dec 21, 2010
- Qimonda AG
- Ulrich Klostermann
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuits; methods for manufacturing an integrated circui...
- Patent number 7,838,861
- Issue date Nov 23, 2010
- Qimonda AG
- Ulrich Klostermann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and integrated circuit for determining the state of a resist...
- Patent number 7,751,231
- Issue date Jul 6, 2010
- Qimonda AG
- Peter Schrogmeier
- G11 - INFORMATION STORAGE
Information Patent Grant
Electric device protection circuit and method for protecting an ele...
- Patent number 7,751,163
- Issue date Jul 6, 2010
- Qimonda AG
- Alexander Duch
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell using spin induced switching effects
- Patent number 7,715,225
- Issue date May 11, 2010
- Qimonda AG
- Wolfgang Raberg
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuits; method for manufacturing an integrated circuit...
- Patent number 7,697,322
- Issue date Apr 13, 2010
- Qimonda AG
- Rainer Leuschner
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit, memory cell, memory module, method of operating...
- Patent number 7,697,313
- Issue date Apr 13, 2010
- Qimonda AG
- Ulrich Klostermann
- G11 - INFORMATION STORAGE
Information Patent Grant
Magnetoresistive random access memory device with alternating liner...
- Patent number 7,663,198
- Issue date Feb 16, 2010
- Qimonda AG
- Ulrich Klostermann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hybrid memory cell for spin-polarized electron current induced swit...
- Patent number 7,630,231
- Issue date Dec 8, 2009
- Infineon Technologies AG
- Jacques Miltat
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuits; methods for operating an integrating circuit;...
- Patent number 7,602,637
- Issue date Oct 13, 2009
- Qimonda AG
- Ulrich Klostermann
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit, cell arrangement, method of operating an integr...
- Patent number 7,532,506
- Issue date May 12, 2009
- Qimonda AG
- Rok Dittrich
- G11 - INFORMATION STORAGE
Information Patent Grant
Magnetoresistive sensor element for sensing a magnetic field
- Patent number 7,495,434
- Issue date Feb 24, 2009
- Infineon Technologies AG
- Juergen Zimmer
- G01 - MEASURING TESTING
Information Patent Grant
MRAM memory cell having a weak intrinsic anisotropic storage layer...
- Patent number 7,436,700
- Issue date Oct 14, 2008
- Infineon Technologies AG
- Manfred Ruehrig
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
PHOTOLITHOGRAPHY MASK GENERATION FOR METALENS
- Publication number 20240288686
- Publication date Aug 29, 2024
- Synopsys, Inc.
- Bernd Kuechler
- G02 - OPTICS
Information Patent Application
STOCHASTIC-AWARE LITHOGRAPHIC MODELS FOR MASK SYNTHESIS
- Publication number 20220146945
- Publication date May 12, 2022
- Synopsys, Inc.
- Kevin Dean Lucas
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
PREDICTING DEFECT RATE BASED ON LITHOGRAPHIC MODEL PARAMETERS
- Publication number 20210116817
- Publication date Apr 22, 2021
- Synopsys, Inc.
- Erik A. Verduijn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LITHOGRAPHY IMPROVEMENT BASED ON DEFECT PROBABILITY DISTRIBUTIONS A...
- Publication number 20210088913
- Publication date Mar 25, 2021
- Synopsys, Inc.
- Lawrence S. Melvin
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Integrated Circuit
- Publication number 20100084741
- Publication date Apr 8, 2010
- Dieter Andres
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT INCLUDING DOPED SEMICONDUCTOR LINE HAVING CONDUC...
- Publication number 20100061140
- Publication date Mar 11, 2010
- QIMONDA AG
- Ulrich Klostermann
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuit, Memory Module, and Method of Manufacturing an I...
- Publication number 20100013035
- Publication date Jan 21, 2010
- Manfred Ruehrig
- G11 - INFORMATION STORAGE
Information Patent Application
MRAM Device Structure Employing Thermally-Assisted Write Operations...
- Publication number 20100002501
- Publication date Jan 7, 2010
- Rainer Leuschner
- G11 - INFORMATION STORAGE
Information Patent Application
MAGNETORESISTIVE SENSOR WITH TUNNEL BARRIER AND METHOD
- Publication number 20090322319
- Publication date Dec 31, 2009
- QIMONDA AG
- Franz Kreupl
- G01 - MEASURING TESTING
Information Patent Application
INTEGRATED CIRCUIT HAVING A MAGNETIC TUNNEL JUNCTION DEVICE AND METHOD
- Publication number 20090321860
- Publication date Dec 31, 2009
- QIMONDA AG
- Ulrich Klostermann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuit, Memory Cell Array, Memory Module, and Method of...
- Publication number 20090273966
- Publication date Nov 5, 2009
- Dietmar Gogl
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND INTEGRATED CIRCUIT FOR DETERMINING THE STATE OF A RESIST...
- Publication number 20090273967
- Publication date Nov 5, 2009
- Qimonda AG
- Peter Schroegmeier
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuit, Memory Cell Arrangement, Thermal Select Magneto...
- Publication number 20090251950
- Publication date Oct 8, 2009
- Ulrich Klostermann
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuit, Method of Manufacturing an Integrated Circuit,...
- Publication number 20090230379
- Publication date Sep 17, 2009
- Ulrich Klostermann
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Cell Layout
- Publication number 20090218600
- Publication date Sep 3, 2009
- Human Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated Circuit, Memory Cell Array, Memory Module, and Method of...
- Publication number 20090218559
- Publication date Sep 3, 2009
- Ulrich Klostermann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuit, Memory Cell Arrangement, Memory Cell, Memory Mo...
- Publication number 20090213642
- Publication date Aug 27, 2009
- Wolfgang Raberg
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuit, Cell Arrangement, Method for Operating an Integ...
- Publication number 20090190409
- Publication date Jul 30, 2009
- Rok Dittrich
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT INCLUDING DOPED SEMICONDUCTOR LINE HAVING CONDUC...
- Publication number 20090108248
- Publication date Apr 30, 2009
- QIMONDA AG
- ULRICH KLOSTERMANN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuit, Memory Cell Array, Memory Cell, Memory Module,...
- Publication number 20090102015
- Publication date Apr 23, 2009
- Ulrich Klostermann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuit, Memory Cell, Memory Module, Method of Operating...
- Publication number 20090097298
- Publication date Apr 16, 2009
- Ulrich Klostermann
- G11 - INFORMATION STORAGE
Information Patent Application
Condensed Memory Cell Structure Using a FinFET
- Publication number 20090085121
- Publication date Apr 2, 2009
- Human Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT, CELL ARRANGEMENT, METHOD OF OPERATING AN INTEGR...
- Publication number 20090073749
- Publication date Mar 19, 2009
- Rok Dittrich
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuits; Methods for Manufacturing an Integrated Circui...
- Publication number 20090072217
- Publication date Mar 19, 2009
- Ulrich Klostermann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuits; Methods for Operating an Integrating Circuit;...
- Publication number 20090073748
- Publication date Mar 19, 2009
- Ulrich Klostermann
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuits; Methods for Manufacturing an Integrated Circui...
- Publication number 20090072348
- Publication date Mar 19, 2009
- Ulrich Klostermann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuits; Methods for Manufacturing an Integrating Circu...
- Publication number 20090073737
- Publication date Mar 19, 2009
- Ulrich Klostermann
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuits; Method for Manufacturing an Integrated Circuit...
- Publication number 20090016096
- Publication date Jan 15, 2009
- Rainer Leuschner
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device and method of operation
- Publication number 20080310210
- Publication date Dec 18, 2008
- Dietmar Gogl
- G11 - INFORMATION STORAGE
Information Patent Application
Method of forming a patterned resist layer for patterning a semicon...
- Publication number 20080203386
- Publication date Aug 28, 2008
- Ulrich Klostermann
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY

Ulrich Klostermann

Person

Patents Grantslast 30 patents

Predicting defect rate based on lithographic model parameters

Stochastic-aware lithographic models for mask synthesis

Lithography improvement based on defect probability distributions a...

Condensed memory cell structure using a FinFET

MRAM device structure employing thermally-assisted write operations...

Integrated circuit including doped semiconductor line having conduc...

Integrated circuit

Integrated circuit having a magnetic tunnel junction device and method

Magnetoresistive memory cell

Integrated circuit, memory cell array, memory module, and method of...

Integrated circuit, memory module, and method of manufacturing an i...

Magnetoresistive sensor with tunnel barrier and method

Integrated circuit, method of manufacturing an integrated circuit,...

Integrated circuits; methods for manufacturing an integrated circui...

Method and integrated circuit for determining the state of a resist...

Electric device protection circuit and method for protecting an ele...

Memory cell using spin induced switching effects

Integrated circuits; method for manufacturing an integrated circuit...

Integrated circuit, memory cell, memory module, method of operating...

Magnetoresistive random access memory device with alternating liner...

Hybrid memory cell for spin-polarized electron current induced swit...

Integrated circuits; methods for operating an integrating circuit;...

Integrated circuit, cell arrangement, method of operating an integr...

Magnetoresistive sensor element for sensing a magnetic field

MRAM memory cell having a weak intrinsic anisotropic storage layer...

Patents Applicationslast 30 patents

PHOTOLITHOGRAPHY MASK GENERATION FOR METALENS

STOCHASTIC-AWARE LITHOGRAPHIC MODELS FOR MASK SYNTHESIS

PREDICTING DEFECT RATE BASED ON LITHOGRAPHIC MODEL PARAMETERS

LITHOGRAPHY IMPROVEMENT BASED ON DEFECT PROBABILITY DISTRIBUTIONS A...

Integrated Circuit

INTEGRATED CIRCUIT INCLUDING DOPED SEMICONDUCTOR LINE HAVING CONDUC...

Integrated Circuit, Memory Module, and Method of Manufacturing an I...

MRAM Device Structure Employing Thermally-Assisted Write Operations...

MAGNETORESISTIVE SENSOR WITH TUNNEL BARRIER AND METHOD

INTEGRATED CIRCUIT HAVING A MAGNETIC TUNNEL JUNCTION DEVICE AND METHOD

Integrated Circuit, Memory Cell Array, Memory Module, and Method of...

METHOD AND INTEGRATED CIRCUIT FOR DETERMINING THE STATE OF A RESIST...

Integrated Circuit, Memory Cell Arrangement, Thermal Select Magneto...

Integrated Circuit, Method of Manufacturing an Integrated Circuit,...

Memory Cell Layout

Integrated Circuit, Memory Cell Array, Memory Module, and Method of...

Integrated Circuit, Memory Cell Arrangement, Memory Cell, Memory Mo...

Integrated Circuit, Cell Arrangement, Method for Operating an Integ...

INTEGRATED CIRCUIT INCLUDING DOPED SEMICONDUCTOR LINE HAVING CONDUC...

Integrated Circuit, Memory Cell Array, Memory Cell, Memory Module,...

Integrated Circuit, Memory Cell, Memory Module, Method of Operating...

Condensed Memory Cell Structure Using a FinFET

INTEGRATED CIRCUIT, CELL ARRANGEMENT, METHOD OF OPERATING AN INTEGR...

Integrated Circuits; Methods for Manufacturing an Integrated Circui...

Integrated Circuits; Methods for Operating an Integrating Circuit;...

Integrated Circuits; Methods for Manufacturing an Integrated Circui...

Integrated Circuits; Methods for Manufacturing an Integrating Circu...

Integrated Circuits; Method for Manufacturing an Integrated Circuit...

Semiconductor memory device and method of operation

Method of forming a patterned resist layer for patterning a semicon...