The invention relates to the field of semiconductor manufacture and in particular to the field of patterning of layers, on semiconductor substrates or on reticle mask substrates, for the production of integrated circuits.
The invention refers to methods of manufacturing semiconductor products or reticle masks. Such methods usually include forming a patterned resist layer on a substrate, that is forming a mask on a substrate or on a layer on a substrate. The substrate can be a semiconductor substrate or a reticle mask substrate.
For lithographically patterning a layer deposited on or above a substrate (which may be a semiconductor product substrate as well as a reticle mask substrate), a mask has to be formed on the layer to be patterned. A mask usually is formed of organic material, based on polymer materials, for instance. Those regions of the resist material exposed during lithographic exposure are etched and removed when developing the resist layer (in case of a positive resist). Those regions of the resist layer shadowed by mask patterns of a reticle mask are maintained (in case of a positive resist). Thereby a patterned resist layer is obtained which masks those regions of the layer of the semiconductor product to be maintained subsequently during etching. The pattern of the resist layer or mask is transferred to the layer or to the substrate.
Conventionally, components provided in the resist material may outgas into the ambient atmosphere, thereby also changing the local composition of the resist material and narrowing the process window for exposing and developing (that is etching) the resist layer. In particular in case of a low pressure atmosphere or vacuum, like used in extreme ultraviolet lithography, for instance, outgassing is yet more critical. However, present EUV (extreme ultraviolet) lithography tools are just applying vacuum or low pressure atmosphere. Furthermore, outgassing components may contaminate the optical system (lens surfaces etc.) of the lithography tool, thereby reducing process window and entailing increased efforts for tool maintenance.
In case of immersion lithography, for instance, contaminations in an immersion liquid (like deionized water or another fluid medium having a high refractive index) may enter the resist material in contact with the immersion liquid. As a consequence, the composition of the resist material is influenced in like manner.
There is a need for providing an improved resist or mask with a more reliable exposure behavior upon lithographic exposure and development. There further is a need for providing methods of providing resist layers less susceptible to the effects of outgassing into an ambient atmosphere or immersion liquid and less susceptible to the entering of contaminants from the outside into the resist material.
A first embodiment discloses a method of forming a patterned resist layer for patterning a substrate. A resist layer is formed on or above a substrate. An inorganic layer is formed on the resist layer. The resist layer covered with the inorganic layer is lithographically exposed. The resist layer covered with the inorganic layer is patterned by etching, thereby forming a patterned resist layer.
A second embodiment discloses a method of forming a mask on a semiconductor product layer of a semiconductor product. A layer on a substrate is formed. A mask layer is formed on the layer by depositing a resist layer made of organic resist material on or above the layer and depositing an inorganic layer made of inorganic material on or above the resist layer.
A third embodiment discloses a method of forming a patterned coated mask in semiconductor manufacture. An organic resist layer is deposited on a substrate or on a layer disposed on the substrate. An inorganic coating is deposited as a protection layer on the organic resist layer, thereby obtaining a coated mask, the organic resist layer covered with the inorganic coating is lithographically exposed. The inorganic coating and the organic resist layer are patterned, thereby obtaining a patterned coated mask.
In a fourth embodiment an intermediate semiconductor product includes a substrate, at least one layer arranged on or above the substrate, a resist layer arranged on or above the layer and an inorganic layer arranged on or above the resist layer.
Herein below embodiments of the invention are described with reference to the figures.
In an embodiment as illustrated in
Preferably the semiconductor product 1 further comprises a layer 3 to be patterned. According to
According to the embodiment of
According to the embodiment of
In contrast to hardmasks, the inorganic layer 5 is arranged on a top surface 4a of the resist material facing away from the substrate 2, that is on top of the resist layer 4.
According to the embodiment of
As already apparent from
Due to the small thickness of the protective coating formed by the inorganic layer 5, the inorganic layer 5 is nearly transmissive for electromagnetic radiation (or electron or ion beams) applied in order to locally expose the resist material. Accordingly, the electromagnetic radiation, the electron beam or ion beam can pass through the inorganic layer 5 and enter the resist layer 4. Alternatively, or in addition there to, an inorganic material may be chosen which as such is transmissive (even at very large thicknesses) for the respective radiation wavelength used for exposing the resist material. For instance, an inorganic material being transmissive in the UV range or EUV range may be used.
On the other hand, due to the small thickness of the inorganic layer 5, the inorganic layer 5 is easily removed in the step of patterning, that is developing the resist layer 4 (
In either case, with or without maintained portions of the inorganic layer 5 on top of the resist layer 4, according to
Generally, the inorganic layer 5 can be made of any inorganic material; in particular any metal, metal oxide, metal alloy or metal alloy oxide may be used. For instance, the inorganic layer may be formed of Al, of Al2O3, MgO, RuOx, BaO, HfOx, WaO, NiFe, CoFe, for instance. Furthermore, the inorganic layer 5 may comprise more than one inorganic layer. For instance, an aluminum layer sandwiched between two aluminum oxide layers may be used for the inorganic layer 5. The inorganic layer forms a sealing layer protecting the upper surface of the resist layer from contamination from outside and from outdiffusion into the ambient air.
Due to the inorganic material forming the inorganic layer 5, outdiffusion and contamination are efficiently prevented even in case of very thin inorganic layers having a thickness of below 20 nm, preferably of below 3 nm. On the other hand, due to the small thickness thereof, an organic layer does not absorb a significant amount of intensity of light used for exposing the resist. In addition, the inorganic layer is easily removable since, due to the small thickness of the inorganic liner, it is rapidly etched by the developing component, like TMAH (tetra methyle ammonium hydroxide), for instance.
In a process of an embodiment of the invention, the resist may be formed on the substrate or on a layer of the semiconductor product comprising the substrate and the layer, inter alia. After soft-baking the resist layer for hardening the resist layer, the resist layer is coated with the inorganic layer by an appropriate technique of depositing the inorganic layer. For instance, the inorganic layer may be deposited by physical vapor deposition, by chemical vapor deposition, by atomic layer deposition, by spin coating or by another technique. In case of physical vapor deposition (PVD), for instance, the deposition according to a modified embodiment may be a reactive deposition in which the plasma further comprises reactive particles like oxygen radicals, nitrogen radicals or any other kind of radicals which react with the metal to be deposited on the resist layer. Accordingly, though a metallic target is used, a metal oxide or another material (formed by oxidation, nitridation, fluorination or any other reaction of the metal with the respective radicals) is actually deposited due to the reaction of the reactive particles with the sputtered metal atoms.
Irrespective of the particular technique of depositing the inorganic layer, the method may proceed with lithographically exposing the mask 6 formed of the resist layer 4 and the inorganic layer 5. Typically, a pattern of a reticle is projected onto the mask 6. Lithographic patterning of the resist layer may be performed by means of UV lithography, EUV lithography, for instance. Alternatively, an electron beam or ion beam may be used for patterning the resist layer. In case of EUV lithography, preferably a low pressure atmosphere or vacuum is applied. Since conventionally outdiffusion is particularly critical in case of low pressure atmosphere or vacuum, a significant improvement of the process window is obtained by means of the inorganic layer on top of the resist layer.
Alternatively, lithographic exposing of a resist layer may be performed by means of immersion lithography, for instance in case of UV lithography at wavelengths of 193 or 157 nm, for instance. An immersion liquid is then applied to the upper surface of the inorganic layer, the immersion liquid filling a space between the inorganic layer, a front lens and a housing laterally surrounding the front lens and ensuring that the space between the front lens and the region of the semiconductor product surface to be patterned (that is the corresponding region of the inorganic layer thereon) is completely filled with the immersion liquid. The immersion liquid, due to its high refractive index, enlarges the process window for lithographic patterning by increasing the numerical aperture. In case of immersion lithography, the inorganic layer prevents contamination of the resist material by immersion liquid molecules. The inorganic layer further allows the use of immersion liquids which could chemically react with or enter the resist layer but which are now separated from the resist layer by means of the inorganic layer material.
Irrespective of the particular technique of lithographically exposing the resist layer, the method may then proceed with an optional post exposure baking step in order to further harden the exposed resist layer. Subsequently, the mask formed of the resist layer and the inorganic layer may be patterned using a developer medium, like an alkaline component known in the art. For instance, TMAH may be used or any other developer medium. The inorganic layer may be removed by the same developer provided for developing the resist material. Alternatively, the inorganic layer may be etched first, in a prior etching step, by means of a separate etching component. Furthermore, the developing component may be chosen such that it includes a component able to etch and thereby remove the inorganic layer. However, due to the small thickness of the inorganic layer, a moderate high selectivity of the developer medium with regard to the resist material exposed and the inorganic material may already be sufficient.
After developing and patterning the resist layer, a patterned resist layer is obtained which forms a patterned mask on the semiconductor product. The patterned mask may comprise the patterned inorganic layer. Alternatively, the inorganic layer may be absent on the patterned resist layer obtained after the developing.
Generally, it is to be noted that the resist layer referred to in the present application can also represent a stack of layers of more than one layer. For instance, the resist layer (stack) can comprise an ARC layer (anti-reflective coating) in addition or may comprise a resist bilayer or multilayer. Accordingly, the resist layer more generally represents a resist layer system comprising at least one organic resist layer. After patterning the resist layer, the inorganic layer, if still present on the patterned resist layer, may be subjected to further processing steps.
As mentioned above, a metallic material rather than a metal oxide material can be deposited as the inorganic layer. In this case, subsequent oxidation may be performed. For instance, the deposited metal inorganic layer may be oxidized by heating the substrate in an oxygen containing atmosphere.
After having provided the inorganic layer 5 on the resist layer 4, the resist layer is exposed.
According to another embodiment of lithographic exposure illustrated in
Due to the inorganic protective layer provided on the resist layer according to this embodiment of the invention, no contamination of resist layer material by contaminants comprised in the immersion liquid can occur. Furthermore, in contrast to conventional immersion lithography, immersion liquid materials other than deionized water can be used since the immersion liquid molecules can no longer enter the resist material due to the presence of the inorganic layer 5. Accordingly, the inorganic layer enables the use of kinds of immersion liquids that conventionally cannot be applied due to undesired chemical reactions or contaminations within the resist material.
The inorganic layer 5 may be formed of aluminum oxide or aluminum or any other metal, metal alloy, metal oxide or metal alloy oxide.
According to
Due to the contact between the resist material of the resist layer 4 and the inorganic material of the inorganic layer 5 all over of the top surface of the resist layer 4, outdiffusion and contamination of the resist material are prevented efficiently. The chemically inert inorganic layer serving as a sealing layer or protective layer increases the process window for lithographically exposing the resist layer is increased significantly and occurrence of defective structures like bridgings is produced significantly.
The embodiments of the invention efficiently prevent diffusion from or to a resist layer and outgassing of a resist layer. Due to the composition of organic materials like polymers (required for forming photoactive molecules), the resist layer may be subjected to outdiffusion of constituents of the resist material and to contamination with particles entering into the resist material from the ambient air or atmosphere. The outgassing components may further contaminate the optical surfaces of the lithography system (e.g., lense surfaces), thus reducing the process window and requiring increased efforts for maintenance of the lithographic system. Since the acid molecules to be formed upon exposure of the resist material are required for dissolving the resist layer upon exposure, the concentration of acid molecules essentially influences the process of dissolving the resist material. However, in case that the ambient air or atmosphere contains alkalic components able to react with the acid molecules or its predecessor molecules, the acid molecule concentration is influenced by contaminations in the ambient atmosphere. Since contaminations from the atmosphere may enter the resist material prior to and during the exposure, the process window for exposing and developing the resist layer is reduced. Thereby defective microelectronic elements (like bridgings of maintained resist material where expected to be removed) may conventionally occur. The embodiments of the present invention efficiently overcome all these drawbacks and enables formation of more inert resist layers and increases the process window.