Vencent Chang

Person

Taipei City, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Methodology for implementing enhanced optical lithography for hole...
- Patent number 9,366,969
- Issue date Jun 14, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Chu Liu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Contrast enhancing exposure system and method for use in semiconduc...
- Patent number 9,091,923
- Issue date Jul 28, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- George Liu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method for patterning a photosensitive layer
- Patent number 8,815,496
- Issue date Aug 26, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsiao-Tzu Lu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method for etching an ultra thin film
- Patent number 8,623,231
- Issue date Jan 7, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- George Liu
- C09 - DYES PAINTS POLISHES NATURAL RESINS ADHESIVES MISCELLANEOUS COMPOSITION...
Information Patent Grant
Methodology for implementing enhanced optical lithography for hole...
- Patent number 8,472,005
- Issue date Jun 25, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- George Liu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method for patterning a photosensitive layer
- Patent number 8,394,576
- Issue date Mar 12, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsiao-Tzu Lu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Semiconductor devices and methods with bilayer dielectrics
- Patent number 8,384,159
- Issue date Feb 26, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Fong-Yu Yen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for patterning a photosensitive layer
- Patent number 8,124,323
- Issue date Feb 28, 2012
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsiao-Tzu Lu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Pattern formation in semiconductor fabrication
- Patent number 8,119,533
- Issue date Feb 21, 2012
- Taiwan Semiconductor Manufacturing Company, Ltd.
- George Liu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Dummy vias for damascene process
- Patent number 7,960,821
- Issue date Jun 14, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kuei Shun Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dummy vias for damascene process
- Patent number 7,767,570
- Issue date Aug 3, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kuei Shun Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of pattern formation in semiconductor fabrication
- Patent number 7,648,918
- Issue date Jan 19, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- George Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having in-chip critical dimension and focus pa...
- Patent number 7,642,101
- Issue date Jan 5, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- George Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor devices and methods with bilayer dielectrics
- Patent number 7,531,399
- Issue date May 12, 2009
- Taiwan Semiconductor Manufacturing Company
- Fong-Yu Yen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Immersion lithography process and mask layer structure applied in t...
- Patent number 7,432,042
- Issue date Oct 7, 2008
- United Microelectronics Corp.
- Vencent Chang
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Top patterned hardmask and method for patterning
- Patent number 7,387,969
- Issue date Jun 17, 2008
- Taiwan Semiconductor Manufacturing Co., Ltd.
- George Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sandwich photoresist structure in photolithographic process
- Patent number 6,844,143
- Issue date Jan 18, 2005
- United Microelectronics Corp.
- Benjamin Szu-Min Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for planarizing barc layer in dual damascene process
- Patent number 6,680,252
- Issue date Jan 20, 2004
- United Microelectronics Corp.
- Anseime Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming via-first dual damascene interconnect structure
- Patent number 6,458,705
- Issue date Oct 1, 2002
- United Microelectronics Corp.
- Kuei-Chun Hung
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Methodology For Implementing Enhanced Optical Lithography For Hole...
- Publication number 20130286371
- Publication date Oct 31, 2013
- George Liu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Method for Patterning a Photosensitive Layer
- Publication number 20130164686
- Publication date Jun 27, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsiao-Tzu Lu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
METHOD FOR PATTERNING A PHOTOSENSITIVE LAYER
- Publication number 20120114872
- Publication date May 10, 2012
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsiao-Tzu Lu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
DUMMY VIAS FOR DAMASCENE PROCESS
- Publication number 20100155963
- Publication date Jun 24, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kuei Shun CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PATTERN FORMATION IN SEMICONDUCTOR FABRICATION
- Publication number 20100109054
- Publication date May 6, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- George Liu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
SEMICONDUCTOR DEVICES AND METHODS WITH BILAYER DIELECTRICS
- Publication number 20090315125
- Publication date Dec 24, 2009
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Fong-Yu Yen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR ETCHING AN ULTRA THIN FILM
- Publication number 20090311628
- Publication date Dec 17, 2009
- Taiwan Semiconductor Manufacturing Company, Ltd.
- George Liu
- C09 - DYES PAINTS POLISHES NATURAL RESINS ADHESIVES MISCELLANEOUS COMPOSITION...
Information Patent Application
METHOD FOR PATTERNING A PHOTOSENSITIVE LAYER
- Publication number 20090081591
- Publication date Mar 26, 2009
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsiao-Tzu Lu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
METHOD OF PATTERN FORMATION IN SEMICONDUCTOR FABRICATION
- Publication number 20090053899
- Publication date Feb 26, 2009
- Taiwan Semiconductor Manufacturing Company, Ltd.
- George Liu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Methodology For Implementing Enhanced Optical Lithography For Hole...
- Publication number 20080204688
- Publication date Aug 28, 2008
- Taiwan Semiconductor Manufacturing Company, Ltd.
- George Liu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Contrast Enhancing Exposure System and Method For Use In Semiconduc...
- Publication number 20080206679
- Publication date Aug 28, 2008
- Taiwan Semiconductor Manufacturing Company, Ltd.
- George Liu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Method of measuring the overlay accuracy of a multi-exposure process
- Publication number 20080153012
- Publication date Jun 26, 2008
- UNITED MICROELECTRONICS CORP.
- George Liu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Semiconductor Device Having In-Chip Critical Dimension and Focus Pa...
- Publication number 20080128924
- Publication date Jun 5, 2008
- Taiwan Semiconductor Manufacturing Company, Ltd.
- George Liu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Method and System For Making Photo-Resist Patterns
- Publication number 20080102648
- Publication date May 1, 2008
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chin-Hsiang Lin
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
SEMICONDUCTOR DEVICES AND METHODS WITH BILAYER DIELECTRICS
- Publication number 20080070395
- Publication date Mar 20, 2008
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Fong-Yu Yen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUMMY VIAS FOR DAMASCENE PROCESS
- Publication number 20070224795
- Publication date Sep 27, 2007
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kuei Shun CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Top patterned hardmask and method for patterning
- Publication number 20060211254
- Publication date Sep 21, 2006
- Taiwan Semiconductor Manufacturing Co., Ltd.
- George Liu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Method of measuring the overlay accuracy of a multi-exposure process
- Publication number 20050244729
- Publication date Nov 3, 2005
- UNITED MICROELECTRONICS CORP.
- George Liu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Immersion lithography process and mask layer structure applied in t...
- Publication number 20050123863
- Publication date Jun 9, 2005
- Vencent Chang
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Method for shrinking the image of photoresist
- Publication number 20040166448
- Publication date Aug 26, 2004
- United Microelectronics Corp.
- Vencent Chang
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Method for shrinking pattern photoresist
- Publication number 20040166447
- Publication date Aug 26, 2004
- Vencent Chang
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Sandwich photoresist structure in phtotlithographic process
- Publication number 20040009434
- Publication date Jan 15, 2004
- United Microelectronics Corp.
- Benjamin Szu-Min Lin
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Method for planarizing barc layer in dual damascene process
- Publication number 20020173152
- Publication date Nov 21, 2002
- Anseime Chen
- H01 - BASIC ELECTRIC ELEMENTS

Vencent Chang

Person

Patents Grantslast 30 patents

Methodology for implementing enhanced optical lithography for hole...

Contrast enhancing exposure system and method for use in semiconduc...

Method for patterning a photosensitive layer

Method for etching an ultra thin film

Methodology for implementing enhanced optical lithography for hole...

Method for patterning a photosensitive layer

Semiconductor devices and methods with bilayer dielectrics

Method for patterning a photosensitive layer

Pattern formation in semiconductor fabrication

Dummy vias for damascene process

Dummy vias for damascene process

Method of pattern formation in semiconductor fabrication

Semiconductor device having in-chip critical dimension and focus pa...

Semiconductor devices and methods with bilayer dielectrics

Immersion lithography process and mask layer structure applied in t...

Top patterned hardmask and method for patterning

Sandwich photoresist structure in photolithographic process

Method for planarizing barc layer in dual damascene process

Method for forming via-first dual damascene interconnect structure

Patents Applicationslast 30 patents

Methodology For Implementing Enhanced Optical Lithography For Hole...

Method for Patterning a Photosensitive Layer

METHOD FOR PATTERNING A PHOTOSENSITIVE LAYER

DUMMY VIAS FOR DAMASCENE PROCESS

PATTERN FORMATION IN SEMICONDUCTOR FABRICATION

SEMICONDUCTOR DEVICES AND METHODS WITH BILAYER DIELECTRICS

METHOD FOR ETCHING AN ULTRA THIN FILM

METHOD FOR PATTERNING A PHOTOSENSITIVE LAYER

METHOD OF PATTERN FORMATION IN SEMICONDUCTOR FABRICATION

Methodology For Implementing Enhanced Optical Lithography For Hole...

Contrast Enhancing Exposure System and Method For Use In Semiconduc...

Method of measuring the overlay accuracy of a multi-exposure process

Semiconductor Device Having In-Chip Critical Dimension and Focus Pa...

Method and System For Making Photo-Resist Patterns

SEMICONDUCTOR DEVICES AND METHODS WITH BILAYER DIELECTRICS

DUMMY VIAS FOR DAMASCENE PROCESS

Top patterned hardmask and method for patterning

Method of measuring the overlay accuracy of a multi-exposure process

Immersion lithography process and mask layer structure applied in t...

Method for shrinking the image of photoresist

Method for shrinking pattern photoresist

Sandwich photoresist structure in phtotlithographic process

Method for planarizing barc layer in dual damascene process