Venkatesh Natarajan

Person

Karnataka, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Reducing overhead in processor array searching
- Patent number 12,032,966
- Issue date Jul 9, 2024
- Texas Instruments Incorporated
- Alan Davis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system to scale routing in Ethernet Virtual Private Netw...
- Patent number 11,804,983
- Issue date Oct 31, 2023
- Hewlett Packard Enterprise Development LP
- Venkatesh Natarajan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Transcendental function evaluation
- Patent number 11,733,969
- Issue date Aug 22, 2023
- Texas Instruments Incorporated
- Prasanth Viswanathan Pillai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor with non-intrusive self-testing
- Patent number 11,656,964
- Issue date May 23, 2023
- Texas Instruments Incorporated
- Venkatesh Natarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for optimizing ARP broadcast
- Patent number 11,646,991
- Issue date May 9, 2023
- Hewlett Packard Enterprise Development LP
- Ankit Kumar Sinha
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Instruction packing scheme for VLIW CPU architecture
- Patent number 11,593,110
- Issue date Feb 28, 2023
- Texas Instruments Incorporated
- Saya Goud Langadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for dynamic tuning of neighbor aging
- Patent number 11,398,971
- Issue date Jul 26, 2022
- Hewlett Packard Enterprise Development LP
- Badrish Adiga H R
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Transcendental function evaluation
- Patent number 11,099,815
- Issue date Aug 24, 2021
- Texas Instruments Incorporated
- Prasanth Viswanathan Pillai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor with non-intrusive self-testing
- Patent number 10,817,395
- Issue date Oct 27, 2020
- Texas Instruments Incorporated
- Venkatesh Natarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transcendental function evaluation
- Patent number 10,725,742
- Issue date Jul 28, 2020
- Texas Instruments Incorporated
- Prasanth Viswanathan Pillai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Architecture and instruction set to support interruptible floating...
- Patent number 10,635,395
- Issue date Apr 28, 2020
- Texas Instruments Incorporated
- Prasanth Viswanathan Pillai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Architecture and instruction set to support integer division
- Patent number 10,628,126
- Issue date Apr 21, 2020
- Texas Instruments Incorporated
- Alexander Tessarolo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Probe counter state for neighbor discovery
- Patent number 10,630,700
- Issue date Apr 21, 2020
- Hewlett Packard Enterprise Development LP
- Venkatesh Natarajan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Architecture and instruction set to support integer division
- Patent number 10,359,995
- Issue date Jul 23, 2019
- Texas Instruments Incorporated
- Alexander Tessarolo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interruptible trigonometric operations
- Patent number 10,168,992
- Issue date Jan 1, 2019
- Texas Instruments Incorporated
- Prasanth Viswanathan Pillai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to perform serial communications
- Patent number 9,614,704
- Issue date Apr 4, 2017
- Texas Instruments Incorporated
- Venkatesh Natarajan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Efficient reconfigurable logic tile
- Patent number 8,841,935
- Issue date Sep 23, 2014
- Texas Instruments Incorporated
- Venkatesh Natarajan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multiple patches to on-chip ROM in a processor with a multilevel me...
- Patent number 7,269,707
- Issue date Sep 11, 2007
- Texas Instruments Incorporated
- Amitabh Menon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implementing complex clock designs in field programmable devices
- Patent number 7,002,369
- Issue date Feb 21, 2006
- Texas Instruments Incorporated
- Venkatesh Natarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Detecting the occurrence of desired values on a bus
- Patent number 6,735,652
- Issue date May 11, 2004
- Texas Instruments Incorporated
- Venkatesh Natarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for combining memory blocks for in circuit emu...
- Patent number 6,611,796
- Issue date Aug 26, 2003
- Texas Instruments Incorporated
- Venkatesh Natarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital signal processing unit with emulation circuitry and debug i...
- Patent number 6,567,910
- Issue date May 20, 2003
- Texas Instruments Incorporated
- Alexander Tessarolo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for providing chained breakpoints in a micropr...
- Patent number 6,449,736
- Issue date Sep 10, 2002
- Texas Instruments Incorporated
- David R. Matt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of initializing CPU for emulation
- Patent number 6,167,365
- Issue date Dec 26, 2000
- Texas Instruments Incorporated
- Madathil R. Karthikeyan
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND APPARATUS TO FACILITATE UNALIGNED BYTE STREAM OPERATIONS
- Publication number 20240427601
- Publication date Dec 26, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Venkatesh Natarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CONDITION BRANCH INSTRUCTION FOR CONDITIONAL BRANCH OPERATIONS
- Publication number 20240427602
- Publication date Dec 26, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Alexander Tessarolo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONDITIONAL BRANCH INSTRUCTIONS FOR AGGREGATING CONDITIONAL BRANCH...
- Publication number 20240427597
- Publication date Dec 26, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Alexander Tessarolo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR REAL-TIME TRIP SEQUENCE DETECTION FOR CAS...
- Publication number 20240362146
- Publication date Oct 31, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Karthikeyan Rajamanickam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS, APPARATUS, AND ARTICLES OF MANUFACTURE TO ALIGN DATA TO AD...
- Publication number 20240362023
- Publication date Oct 31, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Saya Goud Langadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR FAST FAILOVER IN ISP PEERING
- Publication number 20240333580
- Publication date Oct 3, 2024
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP.
- Anoop Govindan Nair
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Reducing Overhead In Processor Array Searching
- Publication number 20240311159
- Publication date Sep 19, 2024
- TEXAS INSTRUMENTS INCORPORATED
- ALAN DAVIS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reducing Overhead In Processor Array Searching
- Publication number 20240111541
- Publication date Apr 4, 2024
- TEXAS INSTRUMENTS INCORPORATED
- ALAN DAVIS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION PACKING SCHEME FOR VLIW CPU ARCHITECTURE
- Publication number 20230221959
- Publication date Jul 13, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Saya Goud Langadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR OPTIMIZING ARP BROADCAST
- Publication number 20220385620
- Publication date Dec 1, 2022
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Ankit Kumar Sinha
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND SYSTEM TO SCALE ROUTING IN ETHERNET VIRTUAL PRIVATE NETW...
- Publication number 20220231880
- Publication date Jul 21, 2022
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Venkatesh Natarajan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEM AND METHOD FOR DYNAMIC TUNING OF NEIGHBOR AGING
- Publication number 20220224626
- Publication date Jul 14, 2022
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Badrish Adiga H R
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
INSTRUCTION PACKING SCHEME FOR VLIW CPU ARCHITECTURE
- Publication number 20220214880
- Publication date Jul 7, 2022
- TEXAS INSTRUMENTS INCORPORATED
- Saya Goud Langadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSCENDENTAL FUNCTION EVALUATION
- Publication number 20210342120
- Publication date Nov 4, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Prasanth Viswanathan Pillai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR WITH NON-INTRUSIVE SELF-TESTING
- Publication number 20210004306
- Publication date Jan 7, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Venkatesh NATARAJAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAILOVER IN A MEDIA ACCESS CONTROL SECURITY CAPABALE DEVICE
- Publication number 20190386824
- Publication date Dec 19, 2019
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Badrish Havaralu Rama Chandra Adiga
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TRANSCENDENTAL FUNCTION EVALUATION
- Publication number 20190369962
- Publication date Dec 5, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Prasanth Viswanathan Pillai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARCHITECTURE AND INSTRUCTION SET TO SUPPORT INTEGER DIVISION
- Publication number 20190286418
- Publication date Sep 19, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Alexander TESSAROLO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR WITH NON-INTRUSIVE SELF-TESTING
- Publication number 20190042381
- Publication date Feb 7, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Venkatesh NATARAJAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Failover in a Media Access Control Security Capable Device
- Publication number 20180302269
- Publication date Oct 18, 2018
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Balaji Sankaran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PROBE COUNTER STATE FOR NEIGHBOR DISCOVERY
- Publication number 20180124074
- Publication date May 3, 2018
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Venkatesh Natarajan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ARCHITECTURE AND INSTRUCTION SET TO SUPPORT INTERRUPTIBLE FLOATING...
- Publication number 20180004485
- Publication date Jan 4, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Prasanth VISWANATHAN PILLAI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARCHITECTURE AND INSTRUCTION SET TO SUPPORT INTEGER DIVISION
- Publication number 20170315779
- Publication date Nov 2, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Alexander TESSAROLO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO PERFORM SERIAL COMMUNICATIONS
- Publication number 20170033955
- Publication date Feb 2, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Venkatesh Natarajan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
EFFICIENT RECONFIGURABLE LOGIC TILE
- Publication number 20140285233
- Publication date Sep 25, 2014
- Texas Instrument Incorporated
- Venkatesh NATARAJAN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Implementing Complex Clock Designs in Field Programmable Devices
- Publication number 20040212397
- Publication date Oct 28, 2004
- TEXAS INSTRUMENTS INCORPORATED
- Venkatesh NATARAJAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiple patches to on-chip ROM in a processor with a multilevel me...
- Publication number 20040163080
- Publication date Aug 19, 2004
- Amitabh Menon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Detecting the occurrence of desired values on a bus
- Publication number 20020166012
- Publication date Nov 7, 2002
- Venkatesh Natarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR CODE-ENHANCED PERFORMANCE IN A DIGITAL SIG...
- Publication number 20020112144
- Publication date Aug 15, 2002
- ALEXANDER TESSAROLO
- G06 - COMPUTING CALCULATING COUNTING

Venkatesh Natarajan

Person

Patents Grantslast 30 patents

Reducing overhead in processor array searching

Method and system to scale routing in Ethernet Virtual Private Netw...

Transcendental function evaluation

Processor with non-intrusive self-testing

System and method for optimizing ARP broadcast

Instruction packing scheme for VLIW CPU architecture

System and method for dynamic tuning of neighbor aging

Transcendental function evaluation

Processor with non-intrusive self-testing

Transcendental function evaluation

Architecture and instruction set to support interruptible floating...

Architecture and instruction set to support integer division

Probe counter state for neighbor discovery

Architecture and instruction set to support integer division

Interruptible trigonometric operations

Methods and apparatus to perform serial communications

Efficient reconfigurable logic tile

Multiple patches to on-chip ROM in a processor with a multilevel me...

Implementing complex clock designs in field programmable devices

Detecting the occurrence of desired values on a bus

Method and apparatus for combining memory blocks for in circuit emu...

Digital signal processing unit with emulation circuitry and debug i...

Method and apparatus for providing chained breakpoints in a micropr...

Method of initializing CPU for emulation

Patents Applicationslast 30 patents

METHODS AND APPARATUS TO FACILITATE UNALIGNED BYTE STREAM OPERATIONS

MULTI-CONDITION BRANCH INSTRUCTION FOR CONDITIONAL BRANCH OPERATIONS

CONDITIONAL BRANCH INSTRUCTIONS FOR AGGREGATING CONDITIONAL BRANCH...

METHODS AND APPARATUS FOR REAL-TIME TRIP SEQUENCE DETECTION FOR CAS...

METHODS, APPARATUS, AND ARTICLES OF MANUFACTURE TO ALIGN DATA TO AD...

METHOD AND SYSTEM FOR FAST FAILOVER IN ISP PEERING

Reducing Overhead In Processor Array Searching

Reducing Overhead In Processor Array Searching

INSTRUCTION PACKING SCHEME FOR VLIW CPU ARCHITECTURE

SYSTEM AND METHOD FOR OPTIMIZING ARP BROADCAST

METHOD AND SYSTEM TO SCALE ROUTING IN ETHERNET VIRTUAL PRIVATE NETW...

SYSTEM AND METHOD FOR DYNAMIC TUNING OF NEIGHBOR AGING

INSTRUCTION PACKING SCHEME FOR VLIW CPU ARCHITECTURE

TRANSCENDENTAL FUNCTION EVALUATION

PROCESSOR WITH NON-INTRUSIVE SELF-TESTING

FAILOVER IN A MEDIA ACCESS CONTROL SECURITY CAPABALE DEVICE

TRANSCENDENTAL FUNCTION EVALUATION

ARCHITECTURE AND INSTRUCTION SET TO SUPPORT INTEGER DIVISION

PROCESSOR WITH NON-INTRUSIVE SELF-TESTING

Failover in a Media Access Control Security Capable Device

PROBE COUNTER STATE FOR NEIGHBOR DISCOVERY

ARCHITECTURE AND INSTRUCTION SET TO SUPPORT INTERRUPTIBLE FLOATING...

ARCHITECTURE AND INSTRUCTION SET TO SUPPORT INTEGER DIVISION

METHODS AND APPARATUS TO PERFORM SERIAL COMMUNICATIONS

EFFICIENT RECONFIGURABLE LOGIC TILE

Implementing Complex Clock Designs in Field Programmable Devices

Multiple patches to on-chip ROM in a processor with a multilevel me...

Detecting the occurrence of desired values on a bus

APPARATUS AND METHOD FOR CODE-ENHANCED PERFORMANCE IN A DIGITAL SIG...