Vijay Kumar Srinivasa Raghavan

Person

Colordo Springs, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Substrate bias feedback scheme to reduce chip leakage power
- Patent number 8,587,365
- Issue date Nov 19, 2013
- Cypress Semiconductor Corporation
- Vijay Kumar Srinivasa Raghavan
- G05 - CONTROLLING REGULATING
Information Patent Grant
Memory architecture having two independently controlled voltage pumps
- Patent number 8,542,541
- Issue date Sep 24, 2013
- Cypress Semiconductor Corporation
- Ryan T. Hirose
- G11 - INFORMATION STORAGE
Information Patent Grant
Substrate bias feedback scheme to reduce chip leakage power
- Patent number 8,085,085
- Issue date Dec 27, 2011
- Cypress Semiconductor Corporation
- Vijay Kumar Srinivasa Raghavan
- G05 - CONTROLLING REGULATING
Information Patent Grant
Memory architecture having a reference current generator that provi...
- Patent number 7,969,804
- Issue date Jun 28, 2011
- Cypress Semiconductor Corporation
- Ryan T. Hirose
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier with leakage testing and read debug capability
- Patent number 7,545,694
- Issue date Jun 9, 2009
- Cypress Semiconductor Corporation
- Vijay Kumar Srinivasa Raghavan
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit and method for discharging high voltage signals
- Patent number 7,012,456
- Issue date Mar 14, 2006
- Cypress Semiconductor Corporation
- Ryan T. Hirose
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit, architecture and method for reading an address counter and...
- Patent number 6,510,483
- Issue date Jan 21, 2003
- Cypress Semiconductor Corp.
- Stefan-Cristian Rezeanu
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
High Speed and Power Efficient Sense Amplifier With Leakage Testing...
- Publication number 20080042691
- Publication date Feb 21, 2008
- Vijay Kumar Srinivasa Raghavan
- G11 - INFORMATION STORAGE

Vijay Kumar Srinivasa Raghavan

Person

Patents Grantslast 30 patents

Substrate bias feedback scheme to reduce chip leakage power

Memory architecture having two independently controlled voltage pumps

Substrate bias feedback scheme to reduce chip leakage power

Memory architecture having a reference current generator that provi...

Sense amplifier with leakage testing and read debug capability

Circuit and method for discharging high voltage signals

Circuit, architecture and method for reading an address counter and...

Patents Applicationslast 30 patents

High Speed and Power Efficient Sense Amplifier With Leakage Testing...