Vinod KARIAT

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Static timing analysis of integrated circuit designs with flexible...
- Patent number 9,129,078
- Issue date Sep 8, 2015
- Cadence Design Systems, Inc.
- Igor Keller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Static timing analysis methods for integrated circuit designs using...
- Patent number 8,966,421
- Issue date Feb 24, 2015
- Cadence Design Systems, Inc.
- Vinod Kariat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for multi-die thermal analysis
- Patent number 8,694,934
- Issue date Apr 8, 2014
- Cadence Design Systems, Inc.
- Eddy Pramono
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods, systems, and apparatus for timing and signal integrity ana...
- Patent number 8,631,369
- Issue date Jan 14, 2014
- Cadence Design Systems, Inc.
- Vinod Kariat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexible noise and delay modeling of circuit stages for static timi...
- Patent number 8,595,669
- Issue date Nov 26, 2013
- Cadence Design Systems, Inc.
- Igor Keller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for multi-die thermal analysis
- Patent number 8,566,760
- Issue date Oct 22, 2013
- Cadence Design Systems, Inc.
- Eddy Pramono
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Concurrent noise and delay modeling of circuit stages for static ti...
- Patent number 8,543,954
- Issue date Sep 24, 2013
- Cadence Design Systems, Inc.
- Igor Keller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for thermal analysis of through-silicon via (TSV)
- Patent number 8,543,952
- Issue date Sep 24, 2013
- Cadence Design Systems, Inc.
- Vinod Kariat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-CCC current source models and static timing analysis methods...
- Patent number 8,533,644
- Issue date Sep 10, 2013
- Cadence Design Systems, Inc.
- Vinod Kariat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sensitivity and static timing analysis for integrated circuit desig...
- Patent number 8,516,420
- Issue date Aug 20, 2013
- Cadence Design Systems, Inc.
- Vinod Kariat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for thermal analysis
- Patent number 8,504,958
- Issue date Aug 6, 2013
- Cadence Design Systems, Inc.
- Vinod Kariat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for multi-die thermal analysis
- Patent number 8,201,113
- Issue date Jun 12, 2012
- Cadence Design Systems, Inc.
- Eddy Pramono
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for thermal analysis
- Patent number 8,104,006
- Issue date Jan 24, 2012
- Cadence Design Systems, Inc.
- Vinod Kariat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for thermal analysis of through-silicon via (TSV)
- Patent number 8,103,996
- Issue date Jan 24, 2012
- Cadence Design Systems, Inc.
- Vinod Kariat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for thermal analysis
- Patent number 8,104,007
- Issue date Jan 24, 2012
- Cadence Design Systems, Inc.
- Vinod Kariat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method to produce an electrical model of an integrated circuit subs...
- Patent number 7,900,166
- Issue date Mar 1, 2011
- Cadence Design Systems, Inc.
- Vinod Kariat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Timing and signal integrity analysis of integrated circuits with se...
- Patent number 7,882,471
- Issue date Feb 1, 2011
- Cadence Design Systems, Inc.
- Vinod Kariat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for substrate noise analysis using substrate t...
- Patent number 7,877,713
- Issue date Jan 25, 2011
- Cadence Design Systems, Inc.
- Vinod Kariat
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Static noise analysis with noise window estimation and propagation
- Patent number 6,836,873
- Issue date Dec 28, 2004
- Cadence Design Systems, Inc.
- Kenneth Tseng
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND APPARATUS FOR MULTI-DIE THERMAL ANALYSIS
- Publication number 20120304137
- Publication date Nov 29, 2012
- Eddy Pramono
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR MULTI-DIE THERMAL ANALYSIS
- Publication number 20120297357
- Publication date Nov 22, 2012
- Eddy Pramono
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR THERMAL ANALYSIS OF THROUGH-SILICON VIA (TSV)
- Publication number 20120210285
- Publication date Aug 16, 2012
- Vinod Kariat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR THERMAL ANALYSIS
- Publication number 20120102449
- Publication date Apr 26, 2012
- Vinod Kariat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR MULTI-DIE THERMAL ANALYSIS
- Publication number 20100023903
- Publication date Jan 28, 2010
- Eddy Pramono
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR THERMAL ANALYSIS
- Publication number 20090319964
- Publication date Dec 24, 2009
- Vinod Kariat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR THERMAL ANALYSIS OF THROUGH-SILICON VIA (TSV)
- Publication number 20090319965
- Publication date Dec 24, 2009
- Vinod Kariat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR THERMAL ANALYSIS
- Publication number 20090199140
- Publication date Aug 6, 2009
- Vinod Kariat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD TO PRODUCE SUBSTRATE NOISE MODEL AND RELATED SYSTEM AND ARTI...
- Publication number 20090006065
- Publication date Jan 1, 2009
- Vinod KARIAT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR SUBSTRATE NOISE ANALYSIS USING SUBSTRATE T...
- Publication number 20090007032
- Publication date Jan 1, 2009
- Vinod KARIAT
- H01 - BASIC ELECTRIC ELEMENTS

Vinod KARIAT

Person

Patents Grantslast 30 patents

Static timing analysis of integrated circuit designs with flexible...

Static timing analysis methods for integrated circuit designs using...

Method and apparatus for multi-die thermal analysis

Methods, systems, and apparatus for timing and signal integrity ana...

Flexible noise and delay modeling of circuit stages for static timi...

Method and apparatus for multi-die thermal analysis

Concurrent noise and delay modeling of circuit stages for static ti...

Method and apparatus for thermal analysis of through-silicon via (TSV)

Multi-CCC current source models and static timing analysis methods...

Sensitivity and static timing analysis for integrated circuit desig...

Method and apparatus for thermal analysis

Method and apparatus for multi-die thermal analysis

Method and apparatus for thermal analysis

Method and apparatus for thermal analysis of through-silicon via (TSV)

Method and apparatus for thermal analysis

Method to produce an electrical model of an integrated circuit subs...

Timing and signal integrity analysis of integrated circuits with se...

Method and apparatus for substrate noise analysis using substrate t...

Static noise analysis with noise window estimation and propagation

Patents Applicationslast 30 patents

METHOD AND APPARATUS FOR MULTI-DIE THERMAL ANALYSIS

METHOD AND APPARATUS FOR MULTI-DIE THERMAL ANALYSIS

METHOD AND APPARATUS FOR THERMAL ANALYSIS OF THROUGH-SILICON VIA (TSV)

METHOD AND APPARATUS FOR THERMAL ANALYSIS

METHOD AND APPARATUS FOR MULTI-DIE THERMAL ANALYSIS

METHOD AND APPARATUS FOR THERMAL ANALYSIS

METHOD AND APPARATUS FOR THERMAL ANALYSIS OF THROUGH-SILICON VIA (TSV)

METHOD AND APPARATUS FOR THERMAL ANALYSIS

METHOD TO PRODUCE SUBSTRATE NOISE MODEL AND RELATED SYSTEM AND ARTI...

METHOD AND APPARATUS FOR SUBSTRATE NOISE ANALYSIS USING SUBSTRATE T...