Walter Di Francesco

Person

Silvi, IT

People

Patents Grantslast 30 patents

Information Patent Grant
Wordline or pillar state detection for faster read access times
- Patent number 12,205,653
- Issue date Jan 21, 2025
- Micron Technology, Inc.
- Violante Moschiano
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit error management in memory devices
- Patent number 12,189,949
- Issue date Jan 7, 2025
- Micron Technology, Inc.
- Jeremy Binfet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Setting switching for single-level cells
- Patent number 12,183,407
- Issue date Dec 31, 2024
- Micron Technology, Inc.
- Umberto Siciliani
- G11 - INFORMATION STORAGE
Information Patent Grant
Flash memory devices including dram
- Patent number 12,165,688
- Issue date Dec 10, 2024
- Micron Technology, Inc.
- Yankang He
- G11 - INFORMATION STORAGE
Information Patent Grant
Continuous memory programming operations
- Patent number 12,094,547
- Issue date Sep 17, 2024
- Micron Technology, Inc.
- Violante Moschiano
- G11 - INFORMATION STORAGE
Information Patent Grant
Power integrity monitoring
- Patent number 12,086,427
- Issue date Sep 10, 2024
- Micron Technology, Inc.
- Sriteja Yamparala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partial block erase operations in memory devices
- Patent number 12,087,372
- Issue date Sep 10, 2024
- Micron Technology, Inc.
- Violante Moschiano
- G11 - INFORMATION STORAGE
Information Patent Grant
Two-pass corrective programming for memory cells that store multipl...
- Patent number 12,068,034
- Issue date Aug 20, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G11 - INFORMATION STORAGE
Information Patent Grant
NAND page buffer based security operations
- Patent number 12,007,912
- Issue date Jun 11, 2024
- Micron Technology, Inc.
- Jeremy Binfet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid parallel programming of single-level cell memory
- Patent number 12,001,336
- Issue date Jun 4, 2024
- Micron Technology, Inc.
- Umberto Siciliani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prioritized power budget arbitration for multiple concurrent memory...
- Patent number 11,977,748
- Issue date May 7, 2024
- Micron Technology, Inc.
- Luca Nubile
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Express programming using advanced cache register release in a memo...
- Patent number 11,908,523
- Issue date Feb 20, 2024
- Micron Technology, Inc.
- Walter Di Francesco
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memories for calibrating sensing of memory cell data states
- Patent number 11,842,774
- Issue date Dec 12, 2023
- Micron Technology, Inc.
- Gianfranco Valeri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous interrupt event handling in multi-plane memory devices
- Patent number 11,842,078
- Issue date Dec 12, 2023
- Micron Technology, Inc.
- Andrea Giovanni Xotta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power budget arbitration for multiple concurrent access operations...
- Patent number 11,775,185
- Issue date Oct 3, 2023
- Micron Technology, Inc.
- Luca Nubile
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Global-local read calibration
- Patent number 11,636,908
- Issue date Apr 25, 2023
- Micron Technology, Inc.
- Violante Moschiano
- G11 - INFORMATION STORAGE
Information Patent Grant
Partially written block treatment
- Patent number 11,416,154
- Issue date Aug 16, 2022
- Micron Technology, Inc.
- Sivagnanam Parthasarathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for calibrating sensing of memory cell data states
- Patent number 11,270,774
- Issue date Mar 8, 2022
- Micron Technology, Inc.
- Gianfranco Valeri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Global-local read calibration
- Patent number 11,177,014
- Issue date Nov 16, 2021
- Micron Technology, Inc.
- Violante Moschiano
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory systems and memory control methods
- Patent number 11,163,572
- Issue date Nov 2, 2021
- Micron Technology, Inc.
- Umberto Siciliani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using a status indicator in a memory sub-system to detect an event
- Patent number 11,120,885
- Issue date Sep 14, 2021
- Micron Technology, Inc.
- Michael G. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory programming techniques
- Patent number 11,061,762
- Issue date Jul 13, 2021
- Intel Corporation
- Naveen Prabhu Vittal Prabhu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Identifying asynchronous power loss
- Patent number 10,942,796
- Issue date Mar 9, 2021
- Micron Technology, Inc.
- Michael G. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partially written block treatment
- Patent number 10,877,679
- Issue date Dec 29, 2020
- Micron Technology, Inc.
- Sivagnanam Parthasarathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using a status indicator in a memory sub-system to detect an event
- Patent number 10,854,305
- Issue date Dec 1, 2020
- Micron Technology, Inc.
- Michael G. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and methods for calibrating sensing of memory cell data s...
- Patent number 10,818,363
- Issue date Oct 27, 2020
- Micron Technolgy, Inc.
- Gianfranco Valeri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance memory controller
- Patent number 10,671,479
- Issue date Jun 2, 2020
- Micron Technology, Inc.
- Violante Moschiano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using a status indicator in a memory sub-system to detect an event
- Patent number 10,593,412
- Issue date Mar 17, 2020
- Micron Technology, Inc.
- Michael G. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Identifying asynchronous power loss
- Patent number 10,430,262
- Issue date Oct 1, 2019
- Micron Technology, Inc.
- Michael G. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partially written block treatment
- Patent number 10,423,350
- Issue date Sep 24, 2019
- Micron Technology, Inc.
- Sivagnanam Parthasarathy
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
FLASH MEMORY DEVICES INCLUDING DRAM
- Publication number 20250069636
- Publication date Feb 27, 2025
- Micron Technology, Inc.
- Yankang He
- G11 - INFORMATION STORAGE
Information Patent Application
STABLE STATE ERROR-HANDLING BIN SELECTION IN MEMORY DEVICES
- Publication number 20250006292
- Publication date Jan 2, 2025
- Micron Technology, Inc.
- Taylor Alu
- G11 - INFORMATION STORAGE
Information Patent Application
CONTINUOUS MEMORY PROGRAMMING OPERATIONS
- Publication number 20240428872
- Publication date Dec 26, 2024
- Micron Technology, Inc.
- Violante Moschiano
- G11 - INFORMATION STORAGE
Information Patent Application
POWER INTEGRITY MONITORING
- Publication number 20240427507
- Publication date Dec 26, 2024
- Micron Technology, Inc.
- Sriteja Yamparala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARTIAL BLOCK ERASE OPERATIONS IN MEMORY DEVICES
- Publication number 20240379176
- Publication date Nov 14, 2024
- Micron Technology, Inc.
- Violante Moschiano
- G11 - INFORMATION STORAGE
Information Patent Application
NAND PAGE BUFFER BASED SECURITY OPERATIONS
- Publication number 20240320162
- Publication date Sep 26, 2024
- Micron Technology, Inc.
- Jeremy BINFET
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID PARALLEL PROGRAMMING OF SINGLE-LEVEL CELL MEMORY
- Publication number 20240281378
- Publication date Aug 22, 2024
- Micron Technology, Inc.
- Umberto Siciliani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRIORITIZED POWER BUDGET ARBITRATION FOR MULTIPLE CONCURRENT MEMORY...
- Publication number 20240272812
- Publication date Aug 15, 2024
- Micron Technology, Inc.
- Luca Nubile
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CURRENT MANAGEMENT DURING DATA BURST OPERATIONS IN A MULTI-DIE MEMO...
- Publication number 20240241643
- Publication date Jul 18, 2024
- Micron Technology, Inc.
- Biagio Iorio
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMING OPERATION USING CACHE REGISTER RELEASE IN A MEMORY SUB-...
- Publication number 20240203501
- Publication date Jun 20, 2024
- Micron Technology, Inc.
- Walter Di Francesco
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DUAL DATA CHANNEL PEAK POWER MANAGEMENT
- Publication number 20240143501
- Publication date May 2, 2024
- Micron Technology, Inc.
- Luca Nubile
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TWO-PASS CORRECTIVE PROGRAMMING FOR MEMORY CELLS THAT STORE MULTIPL...
- Publication number 20240071510
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G11 - INFORMATION STORAGE
Information Patent Application
MULTIPLE CURRENT QUANTIZATION VALUES FOR PEAK POWER MANAGEMENT
- Publication number 20240061592
- Publication date Feb 22, 2024
- Micron Technology, Inc.
- Chulbum Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BIT ERROR MANAGEMENT IN MEMORY DEVICES
- Publication number 20230393739
- Publication date Dec 7, 2023
- Micron Technology, Inc.
- Jeremy BINFET
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NAND PAGE BUFFER BASED SECURITY OPERATIONS
- Publication number 20230393994
- Publication date Dec 7, 2023
- Micron Technology, Inc.
- Jeremy BINFET
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CRYPTOGRAPHIC BLOCK LOCKING IN A NON-VOLATILE MEMORY DEVICE
- Publication number 20230384951
- Publication date Nov 30, 2023
- Micron Technology, Inc.
- Jeremy BINFET
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLASH MEMORY DEVICES INCLUDING DRAM
- Publication number 20230377626
- Publication date Nov 23, 2023
- Micron Technology, Inc.
- Yankang He
- G11 - INFORMATION STORAGE
Information Patent Application
IDENTIFYING A MOST RECENTLY PROGRAMMED PAGE DURING MEMORY DEVICE IN...
- Publication number 20230335199
- Publication date Oct 19, 2023
- Micron Technology, Inc.
- Jeremy BINFET
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUTO-CALIBRATED CORRECTIVE READ
- Publication number 20230335200
- Publication date Oct 19, 2023
- Micron Technology, Inc.
- Chengbin Sun
- G11 - INFORMATION STORAGE
Information Patent Application
PEAK POWER MANAGEMENT WITH DATA WINDOW RESERVATION
- Publication number 20230305616
- Publication date Sep 28, 2023
- Micron Technology, Inc.
- Luca Nubile
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHODS FOR PERFORMING SUCCESSIVE ARRAY OPERATIONS IN...
- Publication number 20230298680
- Publication date Sep 21, 2023
- Micron Technology, Inc.
- Umberto Siciliani
- G11 - INFORMATION STORAGE
Information Patent Application
POWER INTEGRITY MONITORING
- Publication number 20230266890
- Publication date Aug 24, 2023
- Micron Technology, Inc.
- Sriteja Yamparala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WORDLINE OR PILLAR STATE DETECTION FOR FASTER READ ACCESS TIMES
- Publication number 20230197169
- Publication date Jun 22, 2023
- Micron Technology, Inc.
- Violante Moschiano
- G11 - INFORMATION STORAGE
Information Patent Application
SHORTENED SINGLE-LEVEL CELL MEMORY PROGRAMMING
- Publication number 20230134281
- Publication date May 4, 2023
- Micron Technology, Inc.
- Leo Raimondo
- G11 - INFORMATION STORAGE
Information Patent Application
PRIORITIZED POWER BUDGET ARBITRATION FOR MULTIPLE CONCURRENT MEMORY...
- Publication number 20230084630
- Publication date Mar 16, 2023
- Micron Technology, Inc.
- Luca Nubile
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXPRESS PROGRAMMING USING ADVANCED CACHE REGISTER RELEASE IN A MEMO...
- Publication number 20230065421
- Publication date Mar 2, 2023
- Micron Technology, Inc.
- Walter Di Francesco
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTINUOUS MEMORY PROGRAMMING OPERATIONS
- Publication number 20230060312
- Publication date Mar 2, 2023
- Micron Technology, Inc.
- Violante Moschiano
- G11 - INFORMATION STORAGE
Information Patent Application
HYBRID PARALLEL PROGRAMMING OF SINGLE-LEVEL CELL MEMORY
- Publication number 20230027820
- Publication date Jan 26, 2023
- Micron Technology, Inc.
- Umberto Siciliani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARTIAL BLOCK ERASE OPERATIONS IN MEMORY DEVICES
- Publication number 20220415414
- Publication date Dec 29, 2022
- Micron Technology, Inc.
- Violante Moschiano
- G11 - INFORMATION STORAGE
Information Patent Application
ASYNCHRONOUS INTERRUPT EVENT HANDLING IN MULTI-PLANE MEMORY DEVICES
- Publication number 20220405013
- Publication date Dec 22, 2022
- Micron Technology, Inc.
- Andrea Giovanni Xotta
- G06 - COMPUTING CALCULATING COUNTING

Walter Di Francesco

Person

Patents Grantslast 30 patents

Wordline or pillar state detection for faster read access times

Bit error management in memory devices

Setting switching for single-level cells

Flash memory devices including dram

Continuous memory programming operations

Power integrity monitoring

Partial block erase operations in memory devices

Two-pass corrective programming for memory cells that store multipl...

NAND page buffer based security operations

Hybrid parallel programming of single-level cell memory

Prioritized power budget arbitration for multiple concurrent memory...

Express programming using advanced cache register release in a memo...

Memories for calibrating sensing of memory cell data states

Asynchronous interrupt event handling in multi-plane memory devices

Power budget arbitration for multiple concurrent access operations...

Global-local read calibration

Partially written block treatment

Apparatus for calibrating sensing of memory cell data states

Global-local read calibration

Memory systems and memory control methods

Using a status indicator in a memory sub-system to detect an event

Memory programming techniques

Identifying asynchronous power loss

Partially written block treatment

Using a status indicator in a memory sub-system to detect an event

Apparatus and methods for calibrating sensing of memory cell data s...

High performance memory controller

Using a status indicator in a memory sub-system to detect an event

Identifying asynchronous power loss

Partially written block treatment

Patents Applicationslast 30 patents

FLASH MEMORY DEVICES INCLUDING DRAM

STABLE STATE ERROR-HANDLING BIN SELECTION IN MEMORY DEVICES

CONTINUOUS MEMORY PROGRAMMING OPERATIONS

POWER INTEGRITY MONITORING

PARTIAL BLOCK ERASE OPERATIONS IN MEMORY DEVICES

NAND PAGE BUFFER BASED SECURITY OPERATIONS

HYBRID PARALLEL PROGRAMMING OF SINGLE-LEVEL CELL MEMORY

PRIORITIZED POWER BUDGET ARBITRATION FOR MULTIPLE CONCURRENT MEMORY...

CURRENT MANAGEMENT DURING DATA BURST OPERATIONS IN A MULTI-DIE MEMO...

PROGRAMMING OPERATION USING CACHE REGISTER RELEASE IN A MEMORY SUB-...

DUAL DATA CHANNEL PEAK POWER MANAGEMENT

TWO-PASS CORRECTIVE PROGRAMMING FOR MEMORY CELLS THAT STORE MULTIPL...

MULTIPLE CURRENT QUANTIZATION VALUES FOR PEAK POWER MANAGEMENT

BIT ERROR MANAGEMENT IN MEMORY DEVICES

NAND PAGE BUFFER BASED SECURITY OPERATIONS

CRYPTOGRAPHIC BLOCK LOCKING IN A NON-VOLATILE MEMORY DEVICE

FLASH MEMORY DEVICES INCLUDING DRAM

IDENTIFYING A MOST RECENTLY PROGRAMMED PAGE DURING MEMORY DEVICE IN...

AUTO-CALIBRATED CORRECTIVE READ

PEAK POWER MANAGEMENT WITH DATA WINDOW RESERVATION

APPARATUS AND METHODS FOR PERFORMING SUCCESSIVE ARRAY OPERATIONS IN...

POWER INTEGRITY MONITORING

WORDLINE OR PILLAR STATE DETECTION FOR FASTER READ ACCESS TIMES

SHORTENED SINGLE-LEVEL CELL MEMORY PROGRAMMING

PRIORITIZED POWER BUDGET ARBITRATION FOR MULTIPLE CONCURRENT MEMORY...

EXPRESS PROGRAMMING USING ADVANCED CACHE REGISTER RELEASE IN A MEMO...

CONTINUOUS MEMORY PROGRAMMING OPERATIONS

HYBRID PARALLEL PROGRAMMING OF SINGLE-LEVEL CELL MEMORY

PARTIAL BLOCK ERASE OPERATIONS IN MEMORY DEVICES

ASYNCHRONOUS INTERRUPT EVENT HANDLING IN MULTI-PLANE MEMORY DEVICES