Ward G. Fillmore

Person

Hudson, MA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Air bridge structure having dielectric coating
- Patent number 9,362,237
- Issue date Jun 7, 2016
- Raytheon Company
- Ward G. Fillmore
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Air bridge structure having dielectric coating
- Patent number 9,219,024
- Issue date Dec 22, 2015
- Raytheon Company
- Ward G. Fillmore
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Laminated transferable interconnect for microelectronic package
- Patent number 8,969,176
- Issue date Mar 3, 2015
- Raytheon Company
- Ward G. Fillmore
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Method for packaging semiconductors at a wafer level
- Patent number 8,653,673
- Issue date Feb 18, 2014
- Raytheon Company
- Robert B. Hallock
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for packaging semiconductors at wafer level
- Patent number 8,178,391
- Issue date May 15, 2012
- Raytheon Company
- William J. Davis
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Packaging semiconductors at wafer level
- Patent number 8,035,219
- Issue date Oct 11, 2011
- Raytheon Company
- William J. Davis
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
AIR BRIDGE STRUCTURE HAVING DIELECTRIC COATING
- Publication number 20160071809
- Publication date Mar 10, 2016
- Raytheon Company
- Ward G. Fillmore
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
AIR BRIDGE STRUCTURE HAVING DIELECTRIC COATING
- Publication number 20150137310
- Publication date May 21, 2015
- Raytheon Company
- Ward G. Fillmore
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PACKAGING SEMICONDUCTORS AT A WAFER LEVEL
- Publication number 20130154124
- Publication date Jun 20, 2013
- Raytheon Company
- Robert B. Hallock
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LAMINATED TRANSFERABLE INTERCONNECT FOR MICROELECTRONIC PACKAGE
- Publication number 20120139100
- Publication date Jun 7, 2012
- Raytheon Company
- Ward G. Fillmore
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
METHOD FOR PACKAGING SEMICONDUCTORS AT WAFER LEVEL
- Publication number 20120009735
- Publication date Jan 12, 2012
- Raytheon Company
- William J. Davis
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PACKAGING SEMICONDUCTORS AT A WAFER LEVEL
- Publication number 20100013088
- Publication date Jan 21, 2010
- William J. Davis
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Porous materials
- Publication number 20050113472
- Publication date May 26, 2005
- Rohm and Haas Electronic Materials, L.L.C.
- Ward G. Fillmore
- H01 - BASIC ELECTRIC ELEMENTS

Ward G. Fillmore

Person

Patents Grantslast 30 patents

Air bridge structure having dielectric coating

Air bridge structure having dielectric coating

Laminated transferable interconnect for microelectronic package

Method for packaging semiconductors at a wafer level

Method for packaging semiconductors at wafer level

Packaging semiconductors at wafer level

Patents Applicationslast 30 patents

AIR BRIDGE STRUCTURE HAVING DIELECTRIC COATING

AIR BRIDGE STRUCTURE HAVING DIELECTRIC COATING

METHOD FOR PACKAGING SEMICONDUCTORS AT A WAFER LEVEL

LAMINATED TRANSFERABLE INTERCONNECT FOR MICROELECTRONIC PACKAGE

METHOD FOR PACKAGING SEMICONDUCTORS AT WAFER LEVEL

METHOD FOR PACKAGING SEMICONDUCTORS AT A WAFER LEVEL

Porous materials