Wen-Chin Yeh

Person

Fremont, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method of forming an antifuse on a semiconductor substrate using we...
- Patent number 7,026,217
- Issue date Apr 11, 2006
- LSI Logic Corporation
- Arvind Kamath
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Modular growth of multiple gate oxides
- Patent number 6,812,158
- Issue date Nov 2, 2004
- LSI Logic Corporation
- Wen-Chin Yeh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Tungsten local interconnect for silicon integrated circuit structur...
- Patent number 6,329,720
- Issue date Dec 11, 2001
- LSI Logic Corporation
- Weidan Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Inductor with cobalt/nickel core for integrated circuit structure w...
- Patent number 6,166,422
- Issue date Dec 26, 2000
- LSI Logic Corporation
- Linggian Qian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Effective silicide blocking
- Patent number 6,020,242
- Issue date Feb 1, 2000
- LSI Logic Corporation
- Jiunn-Yann Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nitrogen implanted polysilicon gate for MOSFET gate oxide hardening
- Patent number 6,017,808
- Issue date Jan 25, 2000
- LSI Logic Corporation
- Shiuh-Luen Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for forming metal silicide contacts using amorphization of...
- Patent number 6,010,952
- Issue date Jan 4, 2000
- LSI Logic Corporation
- Jiunn-Yann Tsai
- H01 - BASIC ELECTRIC ELEMENTS

Wen-Chin Yeh

Person

Patents Grantslast 30 patents

Method of forming an antifuse on a semiconductor substrate using we...

Modular growth of multiple gate oxides

Tungsten local interconnect for silicon integrated circuit structur...

Inductor with cobalt/nickel core for integrated circuit structure w...

Effective silicide blocking

Nitrogen implanted polysilicon gate for MOSFET gate oxide hardening

Process for forming metal silicide contacts using amorphization of...