William F. Stonecypher

Person

Chapel Hill, NC, US

People

Patents Grantslast 30 patents

Information Patent Grant
Low-power multi-domain synchronizer
- Patent number 11,677,391
- Issue date Jun 13, 2023
- RAMBUS INC.
- Robert E. Palmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for evaluating and optimizing a signaling system
- Patent number 10,855,413
- Issue date Dec 1, 2020
- RAMBUS INC.
- Jared Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller with dynamic core-transfer latency
- Patent number 9,892,771
- Issue date Feb 13, 2018
- Rambus Inc.
- Robert E. Palmer
- G11 - INFORMATION STORAGE
Information Patent Grant
Read strobe gating mechanism
- Patent number 9,368,172
- Issue date Jun 14, 2016
- Rambus Inc.
- Robert E. Palmer
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for evaluating and optimizing a signaling system
- Patent number 9,356,743
- Issue date May 31, 2016
- Rambus Inc.
- Jared Zerbe
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for evaluating and optimizing a signaling system
- Patent number 8,812,919
- Issue date Aug 19, 2014
- Rambus Inc.
- Jared Zerbe
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for evaluating and optimizing a signaling system
- Patent number 8,812,918
- Issue date Aug 19, 2014
- Rambus Inc.
- Jared Zerbe
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for evaluating and optimizing a signaling system
- Patent number 8,756,469
- Issue date Jun 17, 2014
- Rambus Inc.
- Jared Zerbe
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for evaluating and optimizing a signaling system
- Patent number 8,069,378
- Issue date Nov 29, 2011
- Rambus Inc.
- Jared Zerbe
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit, apparatus and method for capturing a representation of a w...
- Patent number 7,765,074
- Issue date Jul 27, 2010
- Rambus Inc.
- Dennis Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for evaluating and optimizing a signaling system
- Patent number 7,490,275
- Issue date Feb 10, 2009
- Rambus Inc.
- Jared Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for evaluating and optimizing a signaling system
- Patent number 7,360,127
- Issue date Apr 15, 2008
- Rambus Inc.
- Jared Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Current control technique
- Patent number 7,352,234
- Issue date Apr 1, 2008
- Rambus Inc.
- Billy Wayne Garrett, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transparent multi-mode PAM interface
- Patent number 7,308,058
- Issue date Dec 11, 2007
- Rambus Inc.
- Jared L. Zerbe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for fail-safe resynchronization with minimum l...
- Patent number 7,288,973
- Issue date Oct 30, 2007
- Rambus Inc.
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technique for utilizing spare bandwidth resulting from the use of a...
- Patent number 7,180,957
- Issue date Feb 20, 2007
- Rambus Inc.
- Anthony Bessios
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Technique for utilizing spare bandwidth resulting from the use of a...
- Patent number 7,180,958
- Issue date Feb 20, 2007
- Rambus Inc.
- Anthony Bessios
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Memory device having an adjustable voltage swing setting
- Patent number 7,167,039
- Issue date Jan 23, 2007
- Rambus Inc.
- Billy Wayne Garrett, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multilevel signal interface testing with binary test apparatus by e...
- Patent number 7,162,672
- Issue date Jan 9, 2007
- Rambus Inc.
- Carl W. Werner
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for multi-level signaling
- Patent number 7,142,612
- Issue date Nov 28, 2006
- Rambus, Inc.
- Mark A. Horowitz
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for evaluating and optimizing a signaling system
- Patent number 7,137,048
- Issue date Nov 14, 2006
- Rambus Inc.
- Jared Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technique for improving the quality of digital signals in a multi-l...
- Patent number 7,113,550
- Issue date Sep 26, 2006
- Rambus Inc.
- William Stonecypher
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuit, apparatus and method for capturing a representation of a w...
- Patent number 7,076,377
- Issue date Jul 11, 2006
- Rambus Inc.
- Dennis Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Phase comparator capable of tolerating a non-50% duty-cycle clocks
- Patent number 6,949,958
- Issue date Sep 27, 2005
- Rambus Inc.
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for evaluating and calibrating a signaling system
- Patent number 6,873,939
- Issue date Mar 29, 2005
- Rambus Inc.
- Jared Zerbe
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system including a memory device having a controlled output...
- Patent number 6,870,419
- Issue date Mar 22, 2005
- Rambus Inc.
- Billy Wayne Garrett, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system including a memory device having a controlled output...
- Patent number 6,608,507
- Issue date Aug 19, 2003
- Rambus Inc.
- Billy Wayne Garrett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor controller device having a controlled output driver c...
- Patent number 6,556,052
- Issue date Apr 29, 2003
- Billy Wayne Garrett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for fail-safe resynchronization with minimum l...
- Patent number 6,473,439
- Issue date Oct 29, 2002
- Rambus Incorporated
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device having a controlled output driver chara...
- Patent number 6,462,591
- Issue date Oct 8, 2002
- Rambus Inc.
- Billy Wayne Garrett
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MEMORY CONTROLLER WITH DYNAMIC CORE-TRANSFER LATENCY
- Publication number 20170092343
- Publication date Mar 30, 2017
- RAMBUS INC.
- Robert E. Palmer
- G11 - INFORMATION STORAGE
Information Patent Application
Method And Apparatus For Evaluating And Optimizing A Signaling System
- Publication number 20160352474
- Publication date Dec 1, 2016
- RAMBUS INC.
- Jared Zerbe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Read Strobe Gating Mechanism
- Publication number 20150221354
- Publication date Aug 6, 2015
- RAMBUS INC.
- Robert E. Palmer
- G11 - INFORMATION STORAGE
Information Patent Application
Method And Apparatus For Evaluating And Optimizing A Signaling System
- Publication number 20150078426
- Publication date Mar 19, 2015
- RAMBUS INC.
- Jared Zerbe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method And Apparatus For Evaluating And Optimizing A Signaling System
- Publication number 20130272360
- Publication date Oct 17, 2013
- Jared Zerbe
- G01 - MEASURING TESTING
Information Patent Application
Method And Apparatus For Evaluating And Optimizing A Signaling System
- Publication number 20130272361
- Publication date Oct 17, 2013
- Jared Zerbe
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND APPARATUS FOR EVALUATING AND OPTIMIZING A SIGNALING SYSTEM
- Publication number 20120147986
- Publication date Jun 14, 2012
- RAMBUS INC.
- Jared Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR EVALUATING AND OPTIMIZING A SIGNALING SYSTEM
- Publication number 20100251040
- Publication date Sep 30, 2010
- RAMBUS INC.
- Jared Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR EVALUATING AND OPTIMIZING A SIGNALING SYSTEM
- Publication number 20070165472
- Publication date Jul 19, 2007
- RAMBUS INC.
- Jared Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CURRENT CONTROL TECHNIQUE
- Publication number 20070115043
- Publication date May 24, 2007
- RAMBUS INC.
- Billy Wayne Garrett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method And Apparatus For Evaluating And Optimizing A Signaling System
- Publication number 20070064510
- Publication date Mar 22, 2007
- RAMBUS INC.
- Jared Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Built-in self-testing of multilevel signal interfaces
- Publication number 20060242483
- Publication date Oct 26, 2006
- Rambus Inc.
- Carl W. Werner
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND APPARATUS FOR EVALUATING AND OPTIMIZING A SIGNALING SYSTEM
- Publication number 20060236183
- Publication date Oct 19, 2006
- RAMBUS INC.
- Jared Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit, apparatus and method for capturing a representation of a w...
- Publication number 20060224339
- Publication date Oct 5, 2006
- Dennis Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and apparatus for fail-safe resynchronization with minimum l...
- Publication number 20060022724
- Publication date Feb 2, 2006
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Transparent multi-mode PAM interface
- Publication number 20050089126
- Publication date Apr 28, 2005
- Jared L. Zerbe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Memory device having an adjustable voltage swing setting
- Publication number 20050040878
- Publication date Feb 24, 2005
- Billy Wayne Garrett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Technique for utilizing spare bandwidth resulting from the use of a...
- Publication number 20040208257
- Publication date Oct 21, 2004
- Anthony Bessios
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Circuit, apparatus and method for capturing a representation of a w...
- Publication number 20040158420
- Publication date Aug 12, 2004
- Dennis Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Technique for improving the quality of digital signals in a multi-l...
- Publication number 20040109509
- Publication date Jun 10, 2004
- William Stonecypher
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Technique for utilizing spare bandwidth resulting from the use of a...
- Publication number 20040109510
- Publication date Jun 10, 2004
- Anthony Bessios
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and apparatus for evaluating and optimizing a signaling system
- Publication number 20030208707
- Publication date Nov 6, 2003
- Jared Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for multi-level signaling
- Publication number 20030095606
- Publication date May 22, 2003
- Mark A. Horowitz
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Multilevel signal interface testing with binary test apparatus by e...
- Publication number 20030093713
- Publication date May 15, 2003
- Carl W. Werner
- G01 - MEASURING TESTING
Information Patent Application
Method and apparatus for evaluating and optimizing a signaling system
- Publication number 20030084385
- Publication date May 1, 2003
- Jared Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Built-in self-testing of multilevel signal interfaces
- Publication number 20030070126
- Publication date Apr 10, 2003
- Carl W. Werner
- G01 - MEASURING TESTING
Information Patent Application
Method and apparatus for fail-safe resynchronization with minimum l...
- Publication number 20030053489
- Publication date Mar 20, 2003
- Rambus, Inc.
- Jared LeVan Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory system including a memory device having a controlled output...
- Publication number 20020196059
- Publication date Dec 26, 2002
- Billy Wayne Garrett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor controller device having a controlled output driver c...
- Publication number 20020070771
- Publication date Jun 13, 2002
- Billy Wayne Garrett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor memory device having a controlled output driver chara...
- Publication number 20020017929
- Publication date Feb 14, 2002
- Billy Wayne Garrett
- G06 - COMPUTING CALCULATING COUNTING

William F. Stonecypher

Person

Patents Grantslast 30 patents

Low-power multi-domain synchronizer

Method and apparatus for evaluating and optimizing a signaling system

Memory controller with dynamic core-transfer latency

Read strobe gating mechanism

Method and apparatus for evaluating and optimizing a signaling system

Method and apparatus for evaluating and optimizing a signaling system

Method and apparatus for evaluating and optimizing a signaling system

Method and apparatus for evaluating and optimizing a signaling system

Method and apparatus for evaluating and optimizing a signaling system

Circuit, apparatus and method for capturing a representation of a w...

Method and apparatus for evaluating and optimizing a signaling system

Method and apparatus for evaluating and optimizing a signaling system

Current control technique

Transparent multi-mode PAM interface

Method and apparatus for fail-safe resynchronization with minimum l...

Technique for utilizing spare bandwidth resulting from the use of a...

Technique for utilizing spare bandwidth resulting from the use of a...

Memory device having an adjustable voltage swing setting

Multilevel signal interface testing with binary test apparatus by e...

Method and apparatus for multi-level signaling

Method and apparatus for evaluating and optimizing a signaling system

Technique for improving the quality of digital signals in a multi-l...

Circuit, apparatus and method for capturing a representation of a w...

Phase comparator capable of tolerating a non-50% duty-cycle clocks

Method and apparatus for evaluating and calibrating a signaling system

Memory system including a memory device having a controlled output...

Memory system including a memory device having a controlled output...

Semiconductor controller device having a controlled output driver c...

Method and apparatus for fail-safe resynchronization with minimum l...

Semiconductor memory device having a controlled output driver chara...

Patents Applicationslast 30 patents

MEMORY CONTROLLER WITH DYNAMIC CORE-TRANSFER LATENCY

Method And Apparatus For Evaluating And Optimizing A Signaling System

Read Strobe Gating Mechanism

Method And Apparatus For Evaluating And Optimizing A Signaling System

Method And Apparatus For Evaluating And Optimizing A Signaling System

Method And Apparatus For Evaluating And Optimizing A Signaling System

METHOD AND APPARATUS FOR EVALUATING AND OPTIMIZING A SIGNALING SYSTEM

METHOD AND APPARATUS FOR EVALUATING AND OPTIMIZING A SIGNALING SYSTEM

METHOD AND APPARATUS FOR EVALUATING AND OPTIMIZING A SIGNALING SYSTEM

CURRENT CONTROL TECHNIQUE

Method And Apparatus For Evaluating And Optimizing A Signaling System

Built-in self-testing of multilevel signal interfaces

METHOD AND APPARATUS FOR EVALUATING AND OPTIMIZING A SIGNALING SYSTEM

Circuit, apparatus and method for capturing a representation of a w...

Method and apparatus for fail-safe resynchronization with minimum l...

Transparent multi-mode PAM interface

Memory device having an adjustable voltage swing setting

Technique for utilizing spare bandwidth resulting from the use of a...

Circuit, apparatus and method for capturing a representation of a w...

Technique for improving the quality of digital signals in a multi-l...

Technique for utilizing spare bandwidth resulting from the use of a...

Method and apparatus for evaluating and optimizing a signaling system

Method and apparatus for multi-level signaling

Multilevel signal interface testing with binary test apparatus by e...

Method and apparatus for evaluating and optimizing a signaling system

Built-in self-testing of multilevel signal interfaces

Method and apparatus for fail-safe resynchronization with minimum l...

Memory system including a memory device having a controlled output...

Semiconductor controller device having a controlled output driver c...

Semiconductor memory device having a controlled output driver chara...