William H. Shepherd

Person

Palacitas, NM, US

People

Patents Grantslast 30 patents

Information Patent Grant
Integrated package and methods for making same
- Patent number 6,528,351
- Issue date Mar 4, 2003
- JigSaw tek, Inc.
- Richard J. Nathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ball grid array structure and method for packaging an integrated ci...
- Patent number 6,034,427
- Issue date Mar 7, 2000
- Prolinx Labs Corporation
- James J. D. Lan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Antifuse interconnect between two conducting layers of a printed ci...
- Patent number 5,962,815
- Issue date Oct 5, 1999
- Prolinx Labs Corporation
- James J. D. Lan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Programmable/reprogrammable structure using fuses and antifuses
- Patent number 5,906,043
- Issue date May 25, 1999
- Prolinx Labs Corporation
- James J. D. Lan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method and structure to interconnect traces of two conductive layer...
- Patent number 5,906,042
- Issue date May 25, 1999
- Prolinx Labs Corporation
- James J. D. Lan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Use of conductive particles in a nonconductive body as an integrate...
- Patent number 5,834,824
- Issue date Nov 10, 1998
- Prolinx Labs Corporation
- William H. Shepherd
- G01 - MEASURING TESTING
Information Patent Grant
Programmable/reprogramable structure using fuses and antifuses
- Patent number 5,808,351
- Issue date Sep 15, 1998
- Prolinx Labs Corporation
- Richard J. Nathan
- G01 - MEASURING TESTING
Information Patent Grant
Ball grid array structure and method for packaging an integrated ci...
- Patent number 5,767,575
- Issue date Jun 16, 1998
- Prolinx Labs Corporation
- James J. D. Lan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication of ferroelectric capacitor and memory cell
- Patent number 5,536,672
- Issue date Jul 16, 1996
- National Semiconductor Corporation
- William D. Miller
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for plasma etch of ruthenium
- Patent number 5,236,550
- Issue date Aug 17, 1993
- National Semiconductor Corporation
- Norman E. Abt
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Ferroelectric capacitor and memory cell including barrier and isola...
- Patent number 5,046,043
- Issue date Sep 3, 1991
- National Semiconductor Corporation
- William D. Miller
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrodes for ceramic oxide capacitors
- Patent number 5,003,428
- Issue date Mar 26, 1991
- National Semiconductor Corporation
- William H. Shepherd
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrodes for electrical ceramic oxide devices
- Patent number 4,982,309
- Issue date Jan 1, 1991
- National Semiconductor Corporation
- William H. Shepherd
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Integrated assembly protocol
- Publication number 20030102572
- Publication date Jun 5, 2003
- Richard J. Nathan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
INTEGRATED PACKAGE AND METHODS FOR MAKING SAME
- Publication number 20030057563
- Publication date Mar 27, 2003
- Richard J. Nathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated package and methods for making same
- Publication number 20030059976
- Publication date Mar 27, 2003
- Richard J. Nathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated assembly protocol
- Publication number 20030057544
- Publication date Mar 27, 2003
- Richard J. Nathan
- H01 - BASIC ELECTRIC ELEMENTS

William H. Shepherd

Person

Patents Grantslast 30 patents

Integrated package and methods for making same

Ball grid array structure and method for packaging an integrated ci...

Antifuse interconnect between two conducting layers of a printed ci...

Programmable/reprogrammable structure using fuses and antifuses

Method and structure to interconnect traces of two conductive layer...

Use of conductive particles in a nonconductive body as an integrate...

Programmable/reprogramable structure using fuses and antifuses

Ball grid array structure and method for packaging an integrated ci...

Fabrication of ferroelectric capacitor and memory cell

Method for plasma etch of ruthenium

Ferroelectric capacitor and memory cell including barrier and isola...

Electrodes for ceramic oxide capacitors

Electrodes for electrical ceramic oxide devices

Patents Applicationslast 30 patents

Integrated assembly protocol

INTEGRATED PACKAGE AND METHODS FOR MAKING SAME

Integrated package and methods for making same

Integrated assembly protocol