Claims
- 1. Structure comprising:
a substrate having a top surface; at least one cavity formed in said substrate adjacent said top surface; and at least one packaged component placed in said at least one cavity so that each of said at least one packaged component has a visible surface approximately coplanar with the top surface of said substrate.
- 2. Structure as in claim 1 wherein each of said at least one packaged component includes a plurality of electrically conductive lands formed on said visible surface.
- 3. Structure as in claim 2 including a conductive layer formed over the visible surface of each of said at least one packaged component, said plurality of electrically conductive lands and the top surface of said substrate.
- 4. Structure as in claim 3 including conductive traces formed on the top surface of said substrate.
- 5. Structure as in claim 4 wherein said conductive layer is patterned to form a plurality of conductive leads interconnecting selected ones of the lands on each of said at least one packaged component to selected ones of said conductive traces.
- 6. Structure as in claim 5 wherein said substrate comprises a printed circuit board and said conductive traces on said printed circuit board interconnect each of said at least one packaged component with other packaged components similarly placed on said printed circuit board.
- 7. Structure as in claim 1 wherein said substrate contains a plurality of cavities, each of said plurality of cavities containing a corresponding packaged component.
- 8. Structure as in claim 7 wherein each of said corresponding packaged components has a visible surface approximately coplanar with the top surface of said substrate.
- 9. Structure as in claim 8 wherein each of said packaged components has a plurality of electrically conductive lands formed on surface.
- 10. Structure as in claim 9 wherein said plurality of electrically conductive lands formed on the visible surface of said packaged component allow electrical connection to electrical circuitry contained in said packaged component.
- 11. The method of fabricating a printed circuit board having a top surface which comprises:
forming a plurality of cavities in said printed circuit board, each said cavity having an opening in said top surface; placing a corresponding plurality of packaged components in said plurality of cavities such that a visible surface of each of said packaged components is substantially coplanar with said top surface, each said packaged component having a plurality of electrically conductive lands formed on the visible surface of said packaged component; forming a conductive layer on the top surface of said printed circuit board, on the visible surfaces of said packaged components and on the plurality of conductive lands on each visible surface; and patterning the conductive layer to form a conductive interconnect to interconnect the packaged components into a desired circuit.
- 12. The method of claim 11 wherein said step of patterning the conductive layer comprises:
forming a photoresist material on said conductive layer; removing selected portions of said photoresist to expose portions of said conductive layer to be removed from said structure; and removing exposed portions of the conductive layer from the structure so as to leave said conductive interconnect.
- 13. The structure as in claim 1 wherein each of said cavities has tapered sides.
- 14. Structure as in claim 1 where each of said cavities has substantially vertical sides.
- 15. Structure as in claim 1 wherein the substrate is formed of a material from the group consisting of plastic, ceramic, epoxy and any combination thereof.
- 16. Structure as in claim 3 wherein the conductive layer comprises a metal selected from the group consisting of copper, aluminum, and a composite of copper and aluminum.
- 17. Structure as in claim 3 wherein said conductive layer comprises copper.
- 18. Structure as in claim 3 wherein said conductive layer comprises a conductive metal.
- 19. Structure as in claim 3 wherein said conductive layer comprises a composite layer comprised of copper laminated with a prepreg.
- 20. Structure as in claim 1 wherein said substrate is formed of conductive material formed into conductive traces and dielectric material.
- 21. Structure as in claim 20 wherein said substrate includes at least one electrically conductive layer formed on one surface thereof.
- 22. Structure as in claim 21 wherein said substrate includes a conductive plane formed below at least one of said at least one cavity.
- 23. Structure as in claim 22 wherein the conductive plane can be used as either a ground plane, a Vcc plane, or an RF shield.
- 24. Structure as in claim 22 wherein said conductive plane comprises a ground plane.
- 25. Structure as in claim 22 wherein said conductive plane comprises a Vcc plane.
- 26. Structure as in claim 22 wherein said conductive plane comprises an RF shield.
- 27. Structure as in claim 1 wherein said packaged component placed in said at least one cavity has a first surface upon which are formed electrically conductive lands and a second surface with no conductive lands, and said packaged component is placed in said at least one cavity such that the conductive lands face up and are in a plane approximately coplanar with the top surface of said substrate.
- 28. Structure as in claim 1 wherein each of said at least one packaged component has lands on one surface and no lands on a second surface and is placed into said at least one cavity such that the lands face the bottom of the cavity.
- 29. Structure as in claim 1 wherein each of said at least one cavity has sidewalls that are substantially perpendicular to said top surface.
- 30. Structure as in claim 1 wherein each of said at least one cavity has sidewalls which are angled with respect to the top surface.
- 31. Structure as in claim 1 wherein each of said at least one packaged component has sidewalls which form an angle with said top surface, said angle being different from the angle formed by the sidewalls of each of said at least one cavity with said top surface.
- 32. Structure as in claim 3 wherein said conductive layer formed over the visible surface of each of said at least one packaged component and the top surface of said substrate is formed by a process selected from the processes consisting of plating, sputtering, evaporation and direct laser write.
- 33. Structure as in claim 1 wherein each of said at least one packaged component is held in its cavity by an adhesive, prepreg or plastic such that said packaged component is permanently attached in said cavity.
- 34. Structure as in claim 1 wherein each of said at least one packaged component is held in its cavity by an adhesive which forms a temporary bond between said packaged component and the cavity thereby to allow the removal and/or replacement of the packaged component from its matching cavity.
- 35. Structure as in claim 3 wherein said conductive layer is patterned to form an electrically conductive interconnect to carry electrical signals between each of said at least one packaged component and traces on the substrate, thereby to form at least part of an electrical system.
- 36. A module including a plurality of structures, each structure comprising the structure as set forth in claim 1, said plurality of structures being stacked such that each such structure but one is on top of another such structure such that said plurality of structures thereby forms a multilayer composite structure.
- 37. A module as in claim 36 including at least one packaged component mounted on a selected surface thereof.
- 38. Structure as in claim 1 wherein said substrate has multiple layers of material and multiple layers of conductive traces and conductive vias formed in said substrate thereby to selectively electrically interconnect said multiple layers of conductive traces in said substrate.
- 39. Structure as in claim 3 wherein said conductive layer is formed from a conductive epoxy or other conductive non-metallic material and is formed into an electrical interconnect pattern.
- 40. A structure made of thermoplastic, a thermo-set plastic or a composite thereof, comprising:
a substrate having a top surface; at least one cavity formed in said substrate, said cavity having lateral dimensions representative of the lateral dimensions of a packaged component to be placed in said cavity; a packaged component placed in one of said at least one cavity such that one surface of said packaged component is approximately coplanar with the top surface of said substrate; and an electrically conductive layer formed over the top surface of said substrate and said one surface of said packaged component.
- 41. Structure as in claim 40 having the characteristic that when said thermoplastic, said thermo-set plastic or said composite thereof is heated and softens, the thermo-plastic, thermo-set plastic or composite thereof will flow around and adherently contact the packaged component to form plastic material in any cavity that may exist between the sides of the packaged component and the sides of the cavity in which the packaged component is placed thereby to adherently hold the packaged component in the cavity.
- 42. The method of fabricating a structure containing a plurality of packaged components which comprises:
placing a plurality of packaged components in a template, each packaged component having one surface upon which has been formed a plurality of electrically conductive lands, said surface containing said electrically conductive lands of each packaged component being directly adjacent said template; placing said template adjacent a substrate of heat-softenable material such that the surface of each packaged component opposite the surface of each packaged component containing the electrically conductive lands is in contact with said substrate; heating said substrate so as to allow each packaged component to adhere to said substrate; removing said template and placing a planarizing plate adjacent the surfaces of said packaged components containing said electrically conductive lands; heating said substrate so as to soften the material of said substrate; and pressing said packaged components into the softened material of said substrate with the planarizing plate until the top surfaces of each of the packaged components containing said electrically conductive lands are approximately coplanar with the top surface of said substrate.
- 43. The method of claim 42 including:
cooling said substrate thereby to allow the material of said substrate to harden and thus firmly embed the packaged components in said substrate.
- 44. The method of claim 43 wherein said planarizing plate has a coating of material formed on the surface of said planarizing plate in contact with said packaged components to allow said planarizing plate to be easily removed from contact with said packaged components.
- 45. The method of fabricating a monolithic integrated structure containing a plurality of packaged components which comprises:
placing the plurality of packaged components adjacent a planarizing plate; causing said packaged components to attach to said planarizing plate; placing said planarizing plate with said packaged components attached thereto into an injection mold; and injecting plastic material into said injection mold such that said plastic material surrounds each of said packaged components thereby to form an integrated structure holding each of said packaged components in fixed relationship to each other.
- 46. The method of claim 45 wherein each of said packaged components has a plurality of electrically conductive lands formed on one surface thereof directly adjacent the planarizing plate.
- 47. The method of claim 46 including:
removing the injection molded structure from the injection mold; removing the planarizing plate from the injection molded structure; and forming an electrically conductive layer of material over the conductive lands and on the exposed surfaces of said packaged components and the top surface of said plastic material formed by injection molding.
- 48. The method of claim 47 including patterning said conductive layer into an electrically conductive interconnect so as to form said packaged components into a desired electrical circuit.
- 49. The method of fabricating a monolithic integrated structure containing one or more packaged components, which comprises:
providing a substrate; picking one or more packaged components from a source of such packaged components and placing each of said one or more packaged components in a corresponding location on said substrate such that each such packaged component so placed is properly oriented in accordance with a planned orientation; and causing each such packaged component to be adherently held in position on such substrate.
- 50. The method of claim 49 including:
heating said substrate so as to soften the material of said substrate; pressing each of said packaged components into the softened material of said substrate such that the top surface of each of said packaged components is visible and substantially coplanar with the top surface of said substrate; and allowing the substrate to cool, thereby to solidly embed each of said packaged components in said cooled substrate.
- 51. The method of claim 50 including:
forming a layer of conductive material over the top surfaces of each of said packaged components and over the top surface of said substrate; and patterning said conductive material into a selected electrically conductive interconnect pattern, thereby to interconnect said packaged components into a desired electrical circuit.
- 52. The method of fabricating a monolithic integrated structure containing one or more packaged components which comprises:
providing a substrate having a top surface thereon; providing a template with openings in one surface thereof for receipt of one or more packaged components; picking one or more packaged components from a source of such packaged components and placing each of said one or more packaged components in a corresponding opening in said template such that each said packaged component so placed is properly oriented in accordance with a planned orientation; and placing said template adjacent said substrate such that the one or more packaged components in said template are placed in corresponding locations on said substrate.
- 53. The method of claim 52 including:
applying adhesive to the top surface of said substrate; and pressing the one or more packaged components held by said template against said adhesive thereby to cause said one or more packaged components to be held in the proper orientation on the top surface of said substrate.
- 54. The method of claim 52 including:
heating said substrate such that said top surface becomes tacky; and pressing the one or more packaged components held by said template against said tacky top surface thereby to cause said one or more packaged components to be held in the proper orientation on said top surface.
- 55. The method of claim 53 including:
removing said template from said substrate while leaving the one or more packaged components in proper location on said substrate.
- 56. The method of fabricating a monolithic integrated structure containing one or more packaged components which comprises:
providing a substrate having a top surface; providing one or more cavities in said substrate, said one or more cavities opening to said top surface; providing a source of one or more packaged components; picking and placing selected ones of said one or more packaged components from said source into corresponding ones of said one or more cavities; and causing said one or more packaged components to be firmly held in said one or more cavities.
- 57. The method of claim 56 including:
placing an adhesive on the bottom surfaces of said one or more cavities so as to hold the corresponding one or more packaged components in said cavities.
- 58. The method of claim 57 including:
placing each of said one or more packaged components in said one or more cavities such that electrically conductive lands on a surface of each of said one or more packaged components are visible along with the top surfaced of said substrate.
- 59. The method of claim 58 including:
providing one or more cavities in said substrate of such a depth that the one or more packaged components placed in said one or more cavities each have a visible surface approximately coplanar with the top surface of said substrate.
- 60. The method of claim 59 wherein each visible surface of said one or more packaged components includes thereon a plurality of electrically conductive lands for making electrical contact with the electrical component within the corresponding packaged component, and the method includes:
forming an electrically conductive layer on the top surface of said substrate, on the visible surface or surfaces of the one or more pack aged components and on the electrically conductive lands on each of said visible surfaces; and patterning said electrically conductive layer into an electrically conductive interconnect structure to interconnect the one or more packaged components to form a desired electrical circuit.
- 61. Structure as in claim 1 wherein said substrate comprises a plastic including fibers selected from the group consisting of glass, fiber glass, and aramid materials.
- 62. Structure as in claim 1 wherein said substrate comprises a metal stamped to form said at least one cavity.
- 63. Structure as in claim 1 wherein said substrate comprises a prepreg laminate material.
- 64. Structure as in claim 1 wherein said substrate comprises a ceramic.
- 65. Structure as in claim 1 wherein said substrate comprises a prepreg laminate material molded to form said at least one cavity in said substrate.
- 66. The method of claim 11 including forming the conductive layer by direct laser write.
- 67. The structure of claim 3 wherein the conductive layer is formed and patterned in part or in whole by direct laser write.
- 68. The method of claim 47 wherein forming an electrically conductive layer comprises:
forming the electrically conductive layer at least in part by direct laser write.
- 69. The structure as in claim 22 wherein said conductive plane comprises a solid sheet of conductive material.
- 70. The structure as in claim 67 wherein said conductive plane is capable of functioning as an RF shield.
- 71. The structure as in claim 69 wherein said conductive plane extends the full lateral extent of the substrate.
- 72. The structure as in claim 22 wherein said conductive plane comprises an intertwined mesh of conductive material.
- 73. The structure as in claim 22 wherein said conductive plane is formed of a meshed construction of conductive material selected from a group consisting of metal, a conductive silicide and a conductive intertwined metal.
- 74. The method of claim 11 including forming a temporary coating of a selected material over the visible surface of each of said packaged components prior to the step of placing said packaged components in said corresponding plurality of cavities.
- 75. The method of claim 74 wherein said temporary coating is selected from a group of materials consisting of a polymer, a plastic, a composite of plastics, and laminates.
- 76. The method of claim 75 wherein said temporary coating has a thickness selected to purposely embed the component a controlled distance below said top surface.
- 77. The method of claim 76 including removing the temporary coating using a method selected from the group consisting of solvents, chemical etching, and plasma etching, thereby to expose the previously protected surfaces of the packaged components.
- 78. The method of claim 45 including;
placing a temporary coating of a selected material over a selected surface of each of said packaged components prior to placing the plurality of packaged components adjacent the planarizing plate, thereby to cause the surface of said packaged components adjacent to the planarizing plate to be displaced from the planarizing plate by the thickness of the temporary coating.
- 79. Structure comprising;
a substrate having a top surface; at least one packaged component embedded in said substrate such that a surface of said at least one packaged component is visible and on the same side of said substrate as said top surface; and at least one semiconductor chip mounted on said substrate and electrically interconnected with said at least one packaged component.
- 80. Structure as in claim 79 wherein said at least one packaged component comprises a plurality of packaged components each of which has a visible surface on the same side of said substrate as said top surface.
- 81. Structure as in claim 79 wherein said at least one semiconductor chip comprises a plurality of semiconductor chips.
- 82. Structure as in claim 79 wherein said at least one packaged component comprises a plurality of packaged components each of which has a visible surface on the same side of said substrate as said top surface and wherein said at least one semiconductor chip comprises a plurality of semiconductor chips, said plurality of semiconductor chips being electrically interconnected with said plurality of packaged components.
- 83. Structure comprising;
a substrate having a top surface; at least one packaged component embedded in said substrate such that a surface of said at least one packaged component is visible and on the same side of said substrate as said top surface; and at least one packaged component mounted on said substrate and electrically interconnected with said at least one packaged component embedded in said substrate.
- 84. Structure as in claim 83 wherein said at least packaged component embedded in said substrate comprises a plurality of packaged components each of which has a visible surface on the same side of said substrate as said top surface.
- 85. Structure as in claim 83 wherein said at least packaged component mounted on said substrate comprises a plurality of packaged components mounted on said substrate, each of said plurality of packaged components mounted on said substrate being electrically interconnected with said at least one packaged component embedded in said substrate.
- 86. Structure as in claim 83 wherein said at least one packaged component comprises a plurality of packaged components each of which has a visible surface on the same said of said substrate as said top surface and said at least one packaged component mounted on said substrate comprises a plurality of packaged components mounted on said substrate and electrically interconnected with said plurality of packaged components embedded in said substrate.
- 87. Structure as in claim 83 wherein said at least one packaged component mounted on said substrate is surface mounted to a patterned metal layer that is formed on the top surface over said at least one packaged component embedded in said substrate.
- 88. Structure as in claim 83 wherein said at least one packaged component is surface mounted to said substrate and is electrically connected through vias to a patterned conductive layer formed under said at least one embedded packaged component.
- 89. Structure as in claim 79 wherein said at least one semiconductor chip is flip chip mounted to a patterned metal layer that is formed on the surface over said at least one embedded packaged component.
- 90. Structure as in claim 79 wherein said at least one semiconductor chip is wire bonded to a patterned conductive layer that is formed on said top surface over said at least one packaged component embedded in said substrate.
- 91. Structure as in claim 89 wherein said chip which is flip chip connected to a patterned conductive layer is flip chip connected to vias which in turn are electrically connected to a patterned conductive layer under said at least one packaged component embedded in said substrate.
- 92. Structure as in claim 90 wherein said at least one semiconductor chip connected to a patterned conductive layer is wire bonded to vias which are electrically connected to a patterned conductive layer formed under said at least one packaged component embedded in said substrate.
RELATED APPLICATION
[0001] This is a continuation in part of application Ser. No. 09/953,005 filed Sep. 13, 2001 entitled “Integrated Assembly Protocol”.
Continuation in Parts (1)
|
Number |
Date |
Country |
Parent |
09953005 |
Sep 2001 |
US |
Child |
10097363 |
Mar 2002 |
US |