William K. Waller

Person

Rockwell, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method for isolating a short-circuited integrated circuit (IC) from...
- Patent number 7,567,091
- Issue date Jul 28, 2009
- Micron Technology, Inc.
- Warren M. Farnworth
- G01 - MEASURING TESTING
Information Patent Grant
Sense amplifier circuitry and architecture to write data into and/o...
- Patent number 7,486,563
- Issue date Feb 3, 2009
- Innovative Silicon ISi Sa
- William Kenneth Waller
- G11 - INFORMATION STORAGE
Information Patent Grant
Device and method for isolating a short-circuited integrated circui...
- Patent number 7,323,896
- Issue date Jan 29, 2008
- Micron Technology, Inc.
- Warren M. Farnworth
- G01 - MEASURING TESTING
Information Patent Grant
System for isolating a short-circuited integrated circuit (IC) from...
- Patent number 7,315,179
- Issue date Jan 1, 2008
- Micron Technology, Inc.
- Warren M. Farnworth
- G01 - MEASURING TESTING
Information Patent Grant
Sense amplifier circuitry and architecture to write data into and/o...
- Patent number 7,301,838
- Issue date Nov 27, 2007
- Innovative Silicon S.A.
- William Kenneth Waller
- G11 - INFORMATION STORAGE
Information Patent Grant
Device and method for isolating a short-circuited integrated circui...
- Patent number 7,276,927
- Issue date Oct 2, 2007
- Micron Technology, Inc.
- Warren M. Farnworth
- G01 - MEASURING TESTING
Information Patent Grant
Method for isolating a short-circuited integrated circuit (IC) from...
- Patent number 7,276,926
- Issue date Oct 2, 2007
- Micron Technology, Inc.
- Warren M. Farnworth
- G01 - MEASURING TESTING
Information Patent Grant
Device and method for isolating a short-circuited integrated circui...
- Patent number 7,212,020
- Issue date May 1, 2007
- Micron Technology, Inc.
- Warren M. Farnworth
- G01 - MEASURING TESTING
Information Patent Grant
Device and method for isolating a short-circuited integrated circui...
- Patent number 7,034,561
- Issue date Apr 25, 2006
- Micron Technology, Inc.
- Warren M. Farnworth
- G01 - MEASURING TESTING
Information Patent Grant
Memory data path circuit
- Patent number 7,032,143
- Issue date Apr 18, 2006
- William Kenneth Waller
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit and method for generating a local clock signal synchronized...
- Patent number 7,028,206
- Issue date Apr 11, 2006
- William Kenneth Waller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Device and method for isolating a short-circuited integrated circui...
- Patent number 6,831,475
- Issue date Dec 14, 2004
- Micron Technology, Inc.
- Warren M. Farnworth
- G01 - MEASURING TESTING
Information Patent Grant
Device and method for repairing a semiconductor memory
- Patent number 6,693,833
- Issue date Feb 17, 2004
- Micron Technology, Inc.
- William K. Waller
- G11 - INFORMATION STORAGE
Information Patent Grant
Device and method for isolating a short-circuited integrated circui...
- Patent number 6,636,068
- Issue date Oct 21, 2003
- Warren M. Farnworth
- G01 - MEASURING TESTING
Information Patent Grant
Memory wordline decoder having signal-driving amplifier
- Patent number 6,621,759
- Issue date Sep 16, 2003
- William K. Waller
- G11 - INFORMATION STORAGE
Information Patent Grant
Device and method for repairing a semiconductor memory
- Patent number 6,574,156
- Issue date Jun 3, 2003
- Micron Technology, Inc.
- William K. Waller
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method implementing repairs on a memory device
- Patent number 6,477,662
- Issue date Nov 5, 2002
- Micron Technology, Inc.
- Ray J. Beffa
- G11 - INFORMATION STORAGE
Information Patent Grant
Device and method for isolating a short-circuited integrated circui...
- Patent number 6,452,415
- Issue date Sep 17, 2002
- Micron Technology, Inc.
- Warren M. Farnworth
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for detecting intercell defects in a memory de...
- Patent number 6,442,719
- Issue date Aug 27, 2002
- Micron Technology, Inc.
- Ray Beffa
- G11 - INFORMATION STORAGE
Information Patent Grant
Device and method for repairing a semiconductor memory
- Patent number 6,434,066
- Issue date Aug 13, 2002
- Micron Technology, Inc.
- William K. Waller
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for testing a memory device having two or more memory arrays
- Patent number 6,430,094
- Issue date Aug 6, 2002
- Micron Technology, Inc.
- William K. Waller
- G11 - INFORMATION STORAGE
Information Patent Grant
Device and method for isolating a short-circuited integrated circui...
- Patent number 6,313,658
- Issue date Nov 6, 2001
- Micron Technology, Inc.
- Warren M. Farnworth
- G01 - MEASURING TESTING
Information Patent Grant
Device and method for repairing a semiconductor memory
- Patent number 6,310,804
- Issue date Oct 30, 2001
- Micron Technology, Inc.
- William K. Waller
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory with local phase generation from global phase...
- Patent number 6,236,614
- Issue date May 22, 2001
- Micron Technology, Inc.
- William K. Waller
- G11 - INFORMATION STORAGE
Information Patent Grant
Wafer level burn-in of memory integrated circuits
- Patent number 6,233,185
- Issue date May 15, 2001
- Micron Technology, Inc.
- Ray Beffa
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method implementing repairs on a memory device
- Patent number 6,145,092
- Issue date Nov 7, 2000
- Micron Technology, Inc.
- Ray J. Beffa
- G11 - INFORMATION STORAGE
Information Patent Grant
Device and method for repairing a semiconductor memory
- Patent number 6,125,067
- Issue date Sep 26, 2000
- Micron Technology, Inc.
- William K. Waller
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory with local phase generation from global phase...
- Patent number 6,104,661
- Issue date Aug 15, 2000
- Micron Technology, Inc.
- William K. Waller
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device having two or more memory arrays and a testpath opera...
- Patent number 6,081,467
- Issue date Jun 27, 2000
- Micron Technology, Inc.
- William K. Waller
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for detecting intercell defects in a memory de...
- Patent number 6,079,037
- Issue date Jun 20, 2000
- Micron Technology, Inc.
- Ray Beffa
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
HALF LATCH LEVEL SHIFTING CIRCUIT FOR NON-VOLATILE MEMORY ARCHITECT...
- Publication number 20230393978
- Publication date Dec 7, 2023
- Intel Corporation
- William K. Waller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-DECK NON-VOLATILE MEMORY ARCHITECTURE WITH IMPROVED ADDRESS L...
- Publication number 20230282259
- Publication date Sep 7, 2023
- Intel Corporation
- William K. Waller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-DECK NON-VOLATILE MEMORY ARCHITECTURE WITH REDUCED TERMINATIO...
- Publication number 20230092848
- Publication date Mar 23, 2023
- Intel Corporation
- William K. Waller
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNOLOGIES FOR REPAIR OF MEMORY WITH ACCESS LINES
- Publication number 20230033277
- Publication date Feb 2, 2023
- Intel Corporation
- William K. Waller
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-DECK NON-VOLATILE MEMORY ARCHITECTURE WITH IMPROVED WORDLINE...
- Publication number 20220101909
- Publication date Mar 31, 2022
- Intel Corporation
- William Waller
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS TO PERFORM A READ OF A COLUMN IN A MEMORY ACCE...
- Publication number 20210407564
- Publication date Dec 30, 2021
- Intel Corporation
- Sourabh DONGAONKAR
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM FOR ISOLATING A SHORT-CIRCUITED INTEGRATED CIRCUIT (IC) FROM...
- Publication number 20090273360
- Publication date Nov 5, 2009
- Micron Technology, Inc.
- Warren M. Farnworth
- G01 - MEASURING TESTING
Information Patent Application
Method for Isolating a Short-Circuited Integrated Circuit (IC) From...
- Publication number 20080111574
- Publication date May 15, 2008
- Micron Technology, Inc.
- Warren M. Farnworth
- G01 - MEASURING TESTING
Information Patent Application
Sense amplifier circuitry and architecture to write data into and/o...
- Publication number 20080062793
- Publication date Mar 13, 2008
- William Kenneth Waller
- G11 - INFORMATION STORAGE
Information Patent Application
Device and method for isolating a short-circuited integrated circui...
- Publication number 20070103167
- Publication date May 10, 2007
- Warren M. Farnworth
- G01 - MEASURING TESTING
Information Patent Application
Device and method for isolating a short-circuited integrated circui...
- Publication number 20070075723
- Publication date Apr 5, 2007
- Warren M. Farnworth
- G01 - MEASURING TESTING
Information Patent Application
Device and method for isolating a short-circuited integrated circui...
- Publication number 20070075725
- Publication date Apr 5, 2007
- Warren M. Farnworth
- G01 - MEASURING TESTING
Information Patent Application
Device and method for isolating a short-circuited integrated circui...
- Publication number 20070075722
- Publication date Apr 5, 2007
- Warren M. Farnworth
- G01 - MEASURING TESTING
Information Patent Application
Device and method for isolating a short-circuited integrated circui...
- Publication number 20060192582
- Publication date Aug 31, 2006
- Warren M. Farnworth
- G01 - MEASURING TESTING
Information Patent Application
Sense amplifier circuitry and architecture to write data into and/o...
- Publication number 20060126374
- Publication date Jun 15, 2006
- William Kenneth Waller
- G11 - INFORMATION STORAGE
Information Patent Application
Device and method for isolating a short-circuited integrated circui...
- Publication number 20050093566
- Publication date May 5, 2005
- Warren M. Farnworth
- G01 - MEASURING TESTING
Information Patent Application
Sense amp equilibration device
- Publication number 20050018506
- Publication date Jan 27, 2005
- William Kenneth Waller
- G11 - INFORMATION STORAGE
Information Patent Application
Device and method for isolating a short-circuited integrated circui...
- Publication number 20040130345
- Publication date Jul 8, 2004
- Warren M. Farnworth
- G01 - MEASURING TESTING
Information Patent Application
Clock synchronizing circuit and method
- Publication number 20040117683
- Publication date Jun 17, 2004
- William Kenneth Waller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Device for semiconductor memory repair
- Publication number 20030229824
- Publication date Dec 11, 2003
- William K. Waller
- G11 - INFORMATION STORAGE
Information Patent Application
Device and method for repairing a semiconductor memory
- Publication number 20030206477
- Publication date Nov 6, 2003
- William K. Waller
- G11 - INFORMATION STORAGE
Information Patent Application
Device and method for isolating a short-circuited integrated circui...
- Publication number 20020190707
- Publication date Dec 19, 2002
- Warren M. Farnworth
- G01 - MEASURING TESTING
Information Patent Application
Device and method for repairing a semiconductor memory
- Publication number 20020186606
- Publication date Dec 12, 2002
- William K. Waller
- G11 - INFORMATION STORAGE
Information Patent Application
Device and method for repairing a semiconductor memory
- Publication number 20020048199
- Publication date Apr 25, 2002
- William K. Waller
- G11 - INFORMATION STORAGE
Information Patent Application
Device and method for isolating a short-circuited integrated circui...
- Publication number 20020030507
- Publication date Mar 14, 2002
- Warren M. Farnworth
- G01 - MEASURING TESTING

William K. Waller

Person

Patents Grantslast 30 patents

Method for isolating a short-circuited integrated circuit (IC) from...

Sense amplifier circuitry and architecture to write data into and/o...

Device and method for isolating a short-circuited integrated circui...

System for isolating a short-circuited integrated circuit (IC) from...

Sense amplifier circuitry and architecture to write data into and/o...

Device and method for isolating a short-circuited integrated circui...

Method for isolating a short-circuited integrated circuit (IC) from...

Device and method for isolating a short-circuited integrated circui...

Device and method for isolating a short-circuited integrated circui...

Memory data path circuit

Circuit and method for generating a local clock signal synchronized...

Device and method for isolating a short-circuited integrated circui...

Device and method for repairing a semiconductor memory

Device and method for isolating a short-circuited integrated circui...

Memory wordline decoder having signal-driving amplifier

Device and method for repairing a semiconductor memory

Apparatus and method implementing repairs on a memory device

Device and method for isolating a short-circuited integrated circui...

Method and apparatus for detecting intercell defects in a memory de...

Device and method for repairing a semiconductor memory

Method for testing a memory device having two or more memory arrays

Device and method for isolating a short-circuited integrated circui...

Device and method for repairing a semiconductor memory

Semiconductor memory with local phase generation from global phase...

Wafer level burn-in of memory integrated circuits

Apparatus and method implementing repairs on a memory device

Device and method for repairing a semiconductor memory

Semiconductor memory with local phase generation from global phase...

Memory device having two or more memory arrays and a testpath opera...

Method and apparatus for detecting intercell defects in a memory de...

Patents Applicationslast 30 patents

HALF LATCH LEVEL SHIFTING CIRCUIT FOR NON-VOLATILE MEMORY ARCHITECT...

MULTI-DECK NON-VOLATILE MEMORY ARCHITECTURE WITH IMPROVED ADDRESS L...

MULTI-DECK NON-VOLATILE MEMORY ARCHITECTURE WITH REDUCED TERMINATIO...

TECHNOLOGIES FOR REPAIR OF MEMORY WITH ACCESS LINES

MULTI-DECK NON-VOLATILE MEMORY ARCHITECTURE WITH IMPROVED WORDLINE...

METHOD AND APPARATUS TO PERFORM A READ OF A COLUMN IN A MEMORY ACCE...

SYSTEM FOR ISOLATING A SHORT-CIRCUITED INTEGRATED CIRCUIT (IC) FROM...

Method for Isolating a Short-Circuited Integrated Circuit (IC) From...

Sense amplifier circuitry and architecture to write data into and/o...

Device and method for isolating a short-circuited integrated circui...

Device and method for isolating a short-circuited integrated circui...

Device and method for isolating a short-circuited integrated circui...

Device and method for isolating a short-circuited integrated circui...

Device and method for isolating a short-circuited integrated circui...

Sense amplifier circuitry and architecture to write data into and/o...

Device and method for isolating a short-circuited integrated circui...

Sense amp equilibration device

Device and method for isolating a short-circuited integrated circui...

Clock synchronizing circuit and method

Device for semiconductor memory repair

Device and method for repairing a semiconductor memory

Device and method for isolating a short-circuited integrated circui...

Device and method for repairing a semiconductor memory

Device and method for repairing a semiconductor memory

Device and method for isolating a short-circuited integrated circui...