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William M. Gervasi
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Los Gatos, CA, US
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Patents Grants
last 30 patents
Information
Patent Grant
Module having at least one thermally conductive layer between print...
Patent number
8,971,045
Issue date
Mar 3, 2015
Netlist, Inc.
Robert S. Pauley
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
Module having at least two surfaces and at least one thermally cond...
Patent number
8,345,427
Issue date
Jan 1, 2013
Netlist, Inc.
Robert S. Pauley
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
Registered dual in-line memory module having an extended register f...
Patent number
8,065,475
Issue date
Nov 22, 2011
Stec, Inc.
William M. Gervasi
G11 - INFORMATION STORAGE
Information
Patent Grant
Module having at least two surfaces and at least one thermally cond...
Patent number
7,839,645
Issue date
Nov 23, 2010
Netlist, Inc.
Robert S. Pauley
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
High density module having at least two substrates and at least one...
Patent number
7,630,202
Issue date
Dec 8, 2009
Netlist, Inc.
Robert S. Pauley
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
High density memory module using stacked printed circuit boards
Patent number
7,375,970
Issue date
May 20, 2008
Netlist, Inc.
Robert S. Pauley
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
High-density memory module utilizing low-density memory components
Patent number
7,286,436
Issue date
Oct 23, 2007
Netlist, Inc.
Jayesh R. Bhakta
G11 - INFORMATION STORAGE
Information
Patent Grant
High density memory module using stacked printed circuit boards
Patent number
7,254,036
Issue date
Aug 7, 2007
Netlist, Inc.
Robert S. Pauley
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Patents Applications
last 30 patents
Information
Patent Application
Memory Bus Loading and Conditioning Module
Publication number
20160124888
Publication date
May 5, 2016
William Michael Gervasi
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Distributed Termination for Flyby Memory Buses
Publication number
20150301977
Publication date
Oct 22, 2015
William Michael Gervasi
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
MEMORY BUS LOADING AND CONDITIONING MODULE
Publication number
20140304445
Publication date
Oct 9, 2014
William Michael Gervasi
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
MODULE HAVING AT LEAST TWO SURFACES AND AT LEAST ONE THERMALLY COND...
Publication number
20110110047
Publication date
May 12, 2011
Netlist, Inc.
Robert S. Pauley
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Application
MODULE HAVING AT LEAST TWO SURFACES AND AT LEAST ONE THERMALLY COND...
Publication number
20100110642
Publication date
May 6, 2010
Netlist, Inc.
Robert S. Pauley
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Application
HIGH DENSITY MODULE HAVING AT LEAST TWO SUBSTRATES AND AT LEAST ONE...
Publication number
20080316712
Publication date
Dec 25, 2008
Robert S. Pauley
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Application
HIGH DENSITY MEMORY MODULE USING STACKED PRINTED CIRCUIT BOARDS
Publication number
20080007921
Publication date
Jan 10, 2008
Robert S. Pauley
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Application
Registered dual in-line memory module having an extended register f...
Publication number
20060259678
Publication date
Nov 16, 2006
SimpleTech, Inc.
William M. Gervasi
G11 - INFORMATION STORAGE
Information
Patent Application
High density memory module using stacked printed circuit boards
Publication number
20060044749
Publication date
Mar 2, 2006
Robert S. Pauley
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Application
High-density memory module utilizing low-density memory components
Publication number
20050281096
Publication date
Dec 22, 2005
Jayesh R. Bhakta
G11 - INFORMATION STORAGE
Information
Patent Application
Printed circuit board memory module with embedded passive components
Publication number
20050094465
Publication date
May 5, 2005
NETLIST INC.
William M. Gervasi
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Application
Memory device load simulator
Publication number
20050086037
Publication date
Apr 21, 2005
Robert S. Pauley
G11 - INFORMATION STORAGE
Information
Patent Application
Non-standard dual in-line memory modules with more than two ranks o...
Publication number
20050044302
Publication date
Feb 24, 2005
Robert S. Pauley
G11 - INFORMATION STORAGE
Information
Patent Application
ARRANGEMENT OF INTEGRATED CIRCUITS IN A MEMORY MODULE
Publication number
20050018495
Publication date
Jan 27, 2005
Netlist, Inc.
Jayesh R. Bhakta
Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...