William R. Weier

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Clock pulse generation circuit
- Patent number 11,038,492
- Issue date Jun 15, 2021
- Apple Inc.
- Steven F. Schicht
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Redundancy implementation using bytewise shifting
- Patent number 10,592,367
- Issue date Mar 17, 2020
- Apple Inc.
- Steven Frederick Schicht
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Level shifting dynamic write driver
- Patent number 10,535,400
- Issue date Jan 14, 2020
- Apple Inc.
- William R. Weier
- G11 - INFORMATION STORAGE
Information Patent Grant
Clock pulse generation circuit
- Patent number 10,389,335
- Issue date Aug 20, 2019
- Apple Inc.
- Steven F. Schicht
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Bitline sensing latch
- Patent number 9,922,688
- Issue date Mar 20, 2018
- Apple Inc.
- William R. Weier
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Self-timed dynamic level shifter with falling edge generator
- Patent number 9,564,901
- Issue date Feb 7, 2017
- Apple Inc.
- Daniel C. Chow
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable delay control for sense amplifiers in a memory
- Patent number 6,385,101
- Issue date May 7, 2002
- Motorola, Inc.
- Ray Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable delay control for sense amplifiers in a memory
- Patent number 6,111,796
- Issue date Aug 29, 2000
- Motorola, Inc.
- Ray Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory utilizing a programmable delay to control address buffers
- Patent number 6,108,266
- Issue date Aug 22, 2000
- Motorola, Inc.
- William Robert Weier
- G11 - INFORMATION STORAGE
Information Patent Grant
Buffer circuit, memory device, and integrated circuit for receiving...
- Patent number 6,044,036
- Issue date Mar 28, 2000
- Motorola, Inc.
- Stephen T. Flannagan
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic sense amplifier in a memory capable of limiting the voltage...
- Patent number 6,031,775
- Issue date Feb 29, 2000
- Motorola Inc.
- Ray Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Timing control of amplifiers in a memory
- Patent number 5,978,286
- Issue date Nov 2, 1999
- Motorola, Inc.
- Ray Chang
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
CLOCK PULSE GENERATION CIRCUIT
- Publication number 20190372559
- Publication date Dec 5, 2019
- Apple Inc.
- Steven F. Schicht
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
REDUNDANCY IMPLEMENTATION USING BYTEWISE SHIFTING
- Publication number 20190087291
- Publication date Mar 21, 2019
- Apple Inc.
- Steven Frederick Schicht
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LEVEL SHIFTING DYNAMIC WRITE DRIVER
- Publication number 20190080748
- Publication date Mar 14, 2019
- Apple Inc.
- William R. Weier
- G11 - INFORMATION STORAGE
Information Patent Application
Bitline Sensing Latch
- Publication number 20180053536
- Publication date Feb 22, 2018
- Apple Inc.
- William R. Weier
- G11 - INFORMATION STORAGE

William R. Weier

Person

Patents Grantslast 30 patents

Clock pulse generation circuit

Redundancy implementation using bytewise shifting

Level shifting dynamic write driver

Clock pulse generation circuit

Bitline sensing latch

Self-timed dynamic level shifter with falling edge generator

Programmable delay control for sense amplifiers in a memory

Programmable delay control for sense amplifiers in a memory

Memory utilizing a programmable delay to control address buffers

Buffer circuit, memory device, and integrated circuit for receiving...

Dynamic sense amplifier in a memory capable of limiting the voltage...

Timing control of amplifiers in a memory

Patents Applicationslast 30 patents

CLOCK PULSE GENERATION CIRCUIT

REDUNDANCY IMPLEMENTATION USING BYTEWISE SHIFTING

LEVEL SHIFTING DYNAMIC WRITE DRIVER

Bitline Sensing Latch