William W. Dostalik

Person

Plano, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Poison-free and low ULK damage integration scheme for damascene int...
- Patent number 8,008,200
- Issue date Aug 30, 2011
- Texas Instruments Incorporated
- Ping Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Poison-free and low ULK damage integration scheme for damascene int...
- Patent number 7,884,019
- Issue date Feb 8, 2011
- Texas Instruments Incorporated
- Ping Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of passivating and/or removing contaminants on a low-k diele...
- Patent number 7,087,518
- Issue date Aug 8, 2006
- Texas Instruments Incorporated
- David Gerald Farber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for etch-stop layer etching during damascene dielectric etch...
- Patent number 7,067,435
- Issue date Jun 27, 2006
- Texas Instruments Incorporated
- William W. Dostalik
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual damascene pattern liner
- Patent number 6,984,580
- Issue date Jan 10, 2006
- Texas Instruments Incorporated
- William W. Dostalik
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer clamping method
- Patent number 5,268,067
- Issue date Dec 7, 1993
- Texas Instruments Incorporated
- William W. Dostalik
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
POISON-FREE AND LOW ULK DAMAGE INTEGRATION SCHEME FOR DAMASCENE INT...
- Publication number 20110143533
- Publication date Jun 16, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Ping Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SILICON CARBIDE FILM FOR INTEGRATED CIRCUIT FABRICATION
- Publication number 20110034023
- Publication date Feb 10, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Laura M. Matz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SiC Film for Semiconductor Processing
- Publication number 20090081864
- Publication date Mar 26, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Laura M. Matz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Silicon Carbide Doped Oxide Hardmask For Single and Dual Damascene...
- Publication number 20090075480
- Publication date Mar 19, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Laura M. Matz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POISON-FREE AND LOW ULK DAMAGE INTEGRATION SCHEME FOR DAMASCENE INT...
- Publication number 20080305625
- Publication date Dec 11, 2008
- Ping Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PREVENTION OF RESIST POISONING IN INTEGRATED CIRCUIT FAB...
- Publication number 20080057701
- Publication date Mar 6, 2008
- TEXAS INSTRUMENTS INCORPORATED
- Edward Raymond Engbrecht
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTIVE DEVICE HAVING RESIST POISON ALUMINUM OXIDE BARRIER A...
- Publication number 20070290347
- Publication date Dec 20, 2007
- TEXAS INSTRUMENTS INCORPORATED
- William W. Dostalik
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor device fabricated using a carbon-containing film as a...
- Publication number 20070210421
- Publication date Sep 13, 2007
- Texas Instruments Inc.
- Haowen Bu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for line etch roughness (LER) reduction for low-k interconne...
- Publication number 20060068594
- Publication date Mar 30, 2006
- Texas Instruments, Inc.
- William W. Dostalik
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for etch-stop layer etching during damascene dielectric etch...
- Publication number 20060068592
- Publication date Mar 30, 2006
- Texas Instruments, Inc.
- William W. Dostalik
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for etching a substrate and a device formed using the method
- Publication number 20050112898
- Publication date May 26, 2005
- Texas Instruments, Incorporated
- K.R. Udayakumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dual damascene pattern liner
- Publication number 20040222529
- Publication date Nov 11, 2004
- William W. Dostalik
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dual damascene pattern liner
- Publication number 20040222527
- Publication date Nov 11, 2004
- William W. Dostalik
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of passivating and/or removing contaminants on a low-k diele...
- Publication number 20030224585
- Publication date Dec 4, 2003
- David Gerald Farber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of passivating and/or removing contaminants on a low-k diele...
- Publication number 20030170992
- Publication date Sep 11, 2003
- David Gerald Farber
- H01 - BASIC ELECTRIC ELEMENTS

William W. Dostalik

Person

Patents Grantslast 30 patents

Poison-free and low ULK damage integration scheme for damascene int...

Poison-free and low ULK damage integration scheme for damascene int...

Method of passivating and/or removing contaminants on a low-k diele...

Method for etch-stop layer etching during damascene dielectric etch...

Dual damascene pattern liner

Wafer clamping method

Patents Applicationslast 30 patents

POISON-FREE AND LOW ULK DAMAGE INTEGRATION SCHEME FOR DAMASCENE INT...

SILICON CARBIDE FILM FOR INTEGRATED CIRCUIT FABRICATION

SiC Film for Semiconductor Processing

Silicon Carbide Doped Oxide Hardmask For Single and Dual Damascene...

POISON-FREE AND LOW ULK DAMAGE INTEGRATION SCHEME FOR DAMASCENE INT...

METHOD FOR PREVENTION OF RESIST POISONING IN INTEGRATED CIRCUIT FAB...

SEMICONDUCTIVE DEVICE HAVING RESIST POISON ALUMINUM OXIDE BARRIER A...

Semiconductor device fabricated using a carbon-containing film as a...

Method for line etch roughness (LER) reduction for low-k interconne...

Method for etch-stop layer etching during damascene dielectric etch...

Method for etching a substrate and a device formed using the method

Dual damascene pattern liner

Dual damascene pattern liner

Method of passivating and/or removing contaminants on a low-k diele...

Method of passivating and/or removing contaminants on a low-k diele...