William Wu Shen

Person

Poughkeepsie, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Address wrap function for addressable memory devices
- Patent number 7,061,821
- Issue date Jun 13, 2006
- International Business Machines Corporation
- Paul William Coteus
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-cycle symbol level error correction and memory system
- Patent number 7,028,248
- Issue date Apr 11, 2006
- International Business Machines Corporation
- Chin-Long Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High speed embedded DRAM with SRAM-like interface
- Patent number 6,941,414
- Issue date Sep 6, 2005
- International Business Machines Corporation
- Louis L. Hsu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-bank chip compatible with a controller designed for a lesser...
- Patent number 6,674,684
- Issue date Jan 6, 2004
- Infineon Technologies North America Corp.
- William Wu Shen
- G11 - INFORMATION STORAGE
Information Patent Grant
Power governor for dynamic RAM
- Patent number 6,667,929
- Issue date Dec 23, 2003
- International Business Machines Corporation
- Vesselina K. Zaharinova-Papazova
- G11 - INFORMATION STORAGE
Information Patent Grant
Generating special uncorrectable error codes for failure isolation
- Patent number 6,519,736
- Issue date Feb 11, 2003
- International Business Machines Corporation
- Chin-Long Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer RAM memory system with enhanced scrubbing and sparing
- Patent number 6,480,982
- Issue date Nov 12, 2002
- International Business Machines Corporation
- Kenneth Y. Chan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single symbol correction double symbol detection code employing a m...
- Patent number 6,463,563
- Issue date Oct 8, 2002
- International Business Machines Corporation
- Chin-Long Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Method system and program products for error correction code conver...
- Patent number 6,460,157
- Issue date Oct 1, 2002
- International Business Machines Corporation
- Chin-Long Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Detecting address faults in an ECC-protected memory
- Patent number 6,457,154
- Issue date Sep 24, 2002
- International Business Machines Corporation
- Chin-Long Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory card identification system
- Patent number 6,386,456
- Issue date May 14, 2002
- International Business Machines Corporation
- Chin-Long Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory card interface method using multiplexed storage protect key...
- Patent number 6,182,174
- Issue date Jan 30, 2001
- International Business Machines Corporation
- Kevin W. Kark
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer system UE recovery logic
- Patent number 6,163,857
- Issue date Dec 19, 2000
- International Business Machines Corporation
- Patrick James Meaney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory request protocol method
- Patent number 6,052,772
- Issue date Apr 18, 2000
- International Business Machines Corporation
- Kevin W. Kark
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory control device, with a common synchronous interface coupled...
- Patent number 6,047,361
- Issue date Apr 4, 2000
- International Business Machines Corporation
- Giacomo Vincent Ingenio
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory implemented error detection and correction code capable of d...
- Patent number 5,768,294
- Issue date Jun 16, 1998
- International Business Machines Corporation
- Chin-Long Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory implemented error detection and correction code using memory...
- Patent number 5,761,221
- Issue date Jun 2, 1998
- International Business Machines Corporation
- Klaus Ruediger Baat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory implemented error detection and correction code with address...
- Patent number 5,751,745
- Issue date May 12, 1998
- International Business Machines Corporation
- Chin-Long Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory implemented error detection and correction code with address...
- Patent number 5,691,996
- Issue date Nov 25, 1997
- International Business Machines Corporation
- Chin-Long Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Barcode scanner with adjustable light source intensity
- Patent number 5,581,071
- Issue date Dec 3, 1996
- International Business Machines Corporation
- Chin-Long Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory access system including a memory controller with memory redr...
- Patent number 5,479,640
- Issue date Dec 26, 1995
- International Business Machines Corporation
- Frank P. Cartman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Excessive error correction control
- Patent number 5,274,646
- Issue date Dec 28, 1993
- International Business Machines Corporation
- Thomas M. Brey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for substituting spare memory chip for malfunc...
- Patent number 5,267,242
- Issue date Nov 30, 1993
- International Business Machines Corporation
- Russell W. Lavallee
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Electrical system including driver that provides a first drive stre...
- Publication number 20070205805
- Publication date Sep 6, 2007
- Oliver Kiehl
- G11 - INFORMATION STORAGE
Information Patent Application
POWER GOVERNOR FOR DYNAMIC RAM
- Publication number 20030231542
- Publication date Dec 18, 2003
- Vesselina K. Zaharinova-Papazova
- G11 - INFORMATION STORAGE
Information Patent Application
High speed embedded dram with sram-like interface
- Publication number 20020174291
- Publication date Nov 21, 2002
- International Business Machines Corporation
- Louis L. Hsu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-cycle symbol level error correction and memory system
- Publication number 20020152444
- Publication date Oct 17, 2002
- International Business Machines Corporation
- Chin-Long Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Address wrap function for addressable memory devices
- Publication number 20020108013
- Publication date Aug 8, 2002
- Paul William Coteus
- G11 - INFORMATION STORAGE

William Wu Shen

Person

Patents Grantslast 30 patents

Address wrap function for addressable memory devices

Multi-cycle symbol level error correction and memory system

High speed embedded DRAM with SRAM-like interface

Multi-bank chip compatible with a controller designed for a lesser...

Power governor for dynamic RAM

Generating special uncorrectable error codes for failure isolation

Computer RAM memory system with enhanced scrubbing and sparing

Single symbol correction double symbol detection code employing a m...

Method system and program products for error correction code conver...

Detecting address faults in an ECC-protected memory

Memory card identification system

Memory card interface method using multiplexed storage protect key...

Computer system UE recovery logic

Memory request protocol method

Memory control device, with a common synchronous interface coupled...

Memory implemented error detection and correction code capable of d...

Memory implemented error detection and correction code using memory...

Memory implemented error detection and correction code with address...

Memory implemented error detection and correction code with address...

Barcode scanner with adjustable light source intensity

Memory access system including a memory controller with memory redr...

Excessive error correction control

Method and apparatus for substituting spare memory chip for malfunc...

Patents Applicationslast 30 patents

Electrical system including driver that provides a first drive stre...

POWER GOVERNOR FOR DYNAMIC RAM

High speed embedded dram with sram-like interface

Multi-cycle symbol level error correction and memory system

Address wrap function for addressable memory devices