Xiaojie He

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
System and method for controlling electrical current supply in a mu...
- Patent number 11,853,111
- Issue date Dec 26, 2023
- Advanced Micro Devices, Inc.
- Amitabh Mehra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power delivery system having low- and high-power power supplies
- Patent number 11,644,853
- Issue date May 9, 2023
- Advanced Micro Devices, Inc.
- Sonu Arora
- G05 - CONTROLLING REGULATING
Information Patent Grant
Electrical power operating states for core logic in a memory physic...
- Patent number 11,567,557
- Issue date Jan 31, 2023
- Advanced Micro Devices, Inc.
- Sridhar Varadharajulu Gada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for controlling electrical current supply in a mu...
- Patent number 11,460,879
- Issue date Oct 4, 2022
- Advanced Micro Devices, Inc.
- Amitabh Mehra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power state transitions
- Patent number 11,455,025
- Issue date Sep 27, 2022
- Advanced Micro Devices, Inc.
- Xiaojie He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tiered low power states
- Patent number 10,775,874
- Issue date Sep 15, 2020
- Advanced Micro Devices, Inc.
- Xiaojie He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Aligning active and idle phases in a mixed workload computing platform
- Patent number 10,712,800
- Issue date Jul 14, 2020
- Advanced Micro Devices, Inc.
- Benjamin Tsien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wireless mass storage flash memory
- Patent number 8,175,528
- Issue date May 8, 2012
- Spansion LLC
- Xiaojie He
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Programmable logic device with multiple slice types
- Patent number 7,696,784
- Issue date Apr 13, 2010
- Lattice Semiconductor Corporation
- Om P. Agrawal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fast-carry arithmetic circuit using a multi-input look-up table
- Patent number 7,685,215
- Issue date Mar 23, 2010
- Lattice Semiconductor Corporation
- Brian Gaide
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual-slice architectures for programmable logic devices
- Patent number 7,675,321
- Issue date Mar 9, 2010
- Lattice Semiconductor Corporation
- Om P. Agrawal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Area efficient routing architectures for programmable logic devices
- Patent number 7,605,606
- Issue date Oct 20, 2009
- Lattice Semiconductor Corporation
- Ming H. Ding
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Logic block control architectures for programmable logic devices
- Patent number 7,592,834
- Issue date Sep 22, 2009
- Lattice Semiconductor Corporation
- Om P. Agrawal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory device with retained indicator of read reference level
- Patent number 7,564,716
- Issue date Jul 21, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Ronald J. Syzdek
- G11 - INFORMATION STORAGE
Information Patent Grant
Logic block control architectures for programmable logic devices
- Patent number 7,397,276
- Issue date Jul 8, 2008
- Lattice Semiconductor Corporation
- Om P. Agrawal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dual slice architectures for programmable logic devices
- Patent number 7,385,417
- Issue date Jun 10, 2008
- Lattice Semiconductor Corporation
- Om P. Agrawal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic device architecture with multiple slice types
- Patent number 7,378,872
- Issue date May 27, 2008
- Lattice Semiconductor Corporation
- Om P. Agrawal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Synchronous memory
- Patent number 7,183,798
- Issue date Feb 27, 2007
- Lattice Semiconductor Corporation
- Xiaojie He
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Enhanced macrocell module having expandable product term sharing ca...
- Patent number 6,653,860
- Issue date Nov 25, 2003
- Lattice Semiconductor Corporation
- Om P. Agrawal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Scalable architecture for high density CPLD's having two-le...
- Patent number 6,348,813
- Issue date Feb 19, 2002
- Lattice Semiconductor Corporation
- Om P. Agrawal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Scalable architecture for high density CPLDS having two-level hiera...
- Patent number 6,184,713
- Issue date Feb 6, 2001
- Lattice Semiconductor Corporation
- Om P. Agrawal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Enhanced macrocell module for high density CPLD architectures
- Patent number 6,150,841
- Issue date Nov 21, 2000
- Lattice Semiconductor Corporation
- Om P. Agrawal
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
PEAK ELECTRICAL CURRENT CONTROL OF SOC OR APU WITH MULTIPLE PROCESS...
- Publication number 20230205304
- Publication date Jun 29, 2023
- ADVANCED MICRO DEVICES, INC.
- Xiuting C. Man
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCED POWER CLOCK GENERATOR FOR LOW POWER DEVICES
- Publication number 20230031295
- Publication date Feb 2, 2023
- ADVANCED MICRO DEVICES, INC.
- Thomas J. Gibney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR CONTROLLILNG ELECTRICAL CURRENT SUPPLY IN A M...
- Publication number 20230004185
- Publication date Jan 5, 2023
- ADVANCED MICRO DEVICES, INC.
- AMITABH MEHRA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Electrical Power Operating States for Core Logic in a Memory Physic...
- Publication number 20210200297
- Publication date Jul 1, 2021
- ADVANCED MICRO DEVICES, INC.
- Sridhar Varadharajulu Gada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER DELIVERY SYSTEM
- Publication number 20210191435
- Publication date Jun 24, 2021
- ADVANCED MICRO DEVICES, INC.
- Sonu Arora
- G05 - CONTROLLING REGULATING
Information Patent Application
MULTI-TIERED LOW POWER STATES
- Publication number 20200409448
- Publication date Dec 31, 2020
- ADVANCED MICRO DEVICES, INC.
- Xiaojie He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TIERED LOW POWER STATES
- Publication number 20200166985
- Publication date May 28, 2020
- ADVANCED MICRO DEVICES, INC.
- Xiaojie He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALIGNING ACTIVE AND IDLE PHASES IN A MIXED WORKLOAD COMPUTING PLATFORM
- Publication number 20190265774
- Publication date Aug 29, 2019
- ADVANCED MICRO DEVICES, INC.
- Benjamin Tsien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WIRELESS MASS STORAGE FLASH MEMORY
- Publication number 20090239468
- Publication date Sep 24, 2009
- SPANSION LLC
- Xiaojie He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE WITH RETAINED INDICATOR OF READ REFERENCE LEVEL
- Publication number 20080117685
- Publication date May 22, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Ronald J. Syzdek
- G11 - INFORMATION STORAGE
Information Patent Application
Multiplexer circuits
- Publication number 20050093577
- Publication date May 5, 2005
- Liem Nguyen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Enhanced macrocell module having expandable product term sharing ca...
- Publication number 20030107401
- Publication date Jun 12, 2003
- Lattice Semiconductor Corporation
- Om P. Agrawal
- H03 - BASIC ELECTRONIC CIRCUITRY

Person

Patents Grantslast 30 patents

System and method for controlling electrical current supply in a mu...

Power delivery system having low- and high-power power supplies

Electrical power operating states for core logic in a memory physic...

System and method for controlling electrical current supply in a mu...

Power state transitions

Multi-tiered low power states

Aligning active and idle phases in a mixed workload computing platform

Wireless mass storage flash memory

Programmable logic device with multiple slice types

Fast-carry arithmetic circuit using a multi-input look-up table

Dual-slice architectures for programmable logic devices

Area efficient routing architectures for programmable logic devices

Logic block control architectures for programmable logic devices

Memory device with retained indicator of read reference level

Logic block control architectures for programmable logic devices

Dual slice architectures for programmable logic devices

Programmable logic device architecture with multiple slice types

Synchronous memory

Enhanced macrocell module having expandable product term sharing ca...

Scalable architecture for high density CPLD&#x00027;s having two-le...

Scalable architecture for high density CPLDS having two-level hiera...

Enhanced macrocell module for high density CPLD architectures

Patents Applicationslast 30 patents

PEAK ELECTRICAL CURRENT CONTROL OF SOC OR APU WITH MULTIPLE PROCESS...

REDUCED POWER CLOCK GENERATOR FOR LOW POWER DEVICES

SYSTEM AND METHOD FOR CONTROLLILNG ELECTRICAL CURRENT SUPPLY IN A M...

Electrical Power Operating States for Core Logic in a Memory Physic...

POWER DELIVERY SYSTEM

MULTI-TIERED LOW POWER STATES

MULTI-TIERED LOW POWER STATES

ALIGNING ACTIVE AND IDLE PHASES IN A MIXED WORKLOAD COMPUTING PLATFORM

WIRELESS MASS STORAGE FLASH MEMORY

MEMORY DEVICE WITH RETAINED INDICATOR OF READ REFERENCE LEVEL

Multiplexer circuits

Enhanced macrocell module having expandable product term sharing ca...

Scalable architecture for high density CPLD's having two-le...